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[rfc][8/13] Eliminate read_register: Uses in software_single_step callbacks
- From: "Ulrich Weigand" <uweigand at de dot ibm dot com>
- To: gdb-patches at sourceware dot org
- Date: Thu, 7 Jun 2007 22:59:54 +0200 (CEST)
- Subject: [rfc][8/13] Eliminate read_register: Uses in software_single_step callbacks
Hello,
one major cause for tdep files calling read_register or accessing the
current_regcache is implementations of the software_single_step callback.
With a recent change, I've added a REGCACHE argument to that callback,
but this isn't really used anywhere. When trying to actually use it,
I noticed that this is a bit awkward as the regcache routines aren't as
simple to use as read_register. Thus I went back to Dan Jacobowitz's
suggestion and changed the REGCACHE to a FRAME (passing in the current
frame in infrun.c). This makes actually using the argument a bit simpler.
Sorry for not taking up that suggestion right away ...
The patch makes this change, and modifies all implementations of the
callback (and their subroutines) to read registers from the passed-in
frame instead of from global state.
Bye,
Ulrich
ChangeLog:
* gdbarch.sh (software_single_step): Replace REGCACHE argument by
FRAME argument.
* gdbarch.c, gdbarch.h: Regenerate.
* infrun.c (resume): Pass current frame to SOFTWARE_SINGLE_STEP.
* alpha-tdep.c (alpha_next_pc): Add FRAME argument. Retrieve
registers from FRAME instead of using read_register.
(alpha_software_single_step): Replace REGCACHE by FRAME. Pass FRAME
to alpha_next_pc. Use get_frame_pc instead of read_pc.
* alpha-tdep.h (alpha_software_single_step): Replace REGCACHE
argument by FRAME.
* arm-tdep.c (shifted_reg_val): Add FRAME argument. Read registers
from FRAME instead of using read_register.
(thumb_get_next_pc): Likewise.
(arm_get_next_pc): Likewise.
(arm_software_single_step): Replace REGCACHE by FRAME. Pass FRAME
to arm_get_next_pc. Use get_frame_pc instead of read_register.
* arm-tdep.h (arm_software_single_step): Replace REGCACHE
argument by FRAME.
* cris-tdep.c (find_step_target): Add FRAME argument. Read registers
from FRAME instead of using read_register.
(cris_software_single_step): Replace REGCACHE by FRAME. Pass FRAME
to find_step_target.
* mips-tdep.c (mips32_next_pc): Add FRAME argument. Read registers
from FRAME instead of using read_register / read_signed_register.
(extended_mips16_next_pc): Likewise.
(mips16_next_pc): Likewise.
(mips_next_pc): Likewise.
(mips_software_single_step): Replace REGCACHE by FRAME. Pass FRAME
to mips_next_pc. Use get_frame_pc instead of read_pc.
* mips-tdep.h (mips_software_single_step): Replace REGCACHE
argument by FRAME.
* rs6000-tdep.c (branch_dest): Add FRAME argument. Use it instead
of current frame. Read registers from FRAME.
(deal_with_atomic_sequence): Add FRAME argument. Pass it to
branch_dest. Use get_frame_pc instead of read_pc.
(rs6000_software_single_step): Likewise.
(bl_to_blrl_insn_p): Do not call branch_dest.
* rs6000-tdep.h (rs6000_software_single_step): Replace REGCACHE
argument by FRAME.
* sparc64-linux-tdep.c (sparc64_linux_step_trap): Add FRAME argument.
Read registers from FRAME instead of current regcache.
* sparc-linux-tdep.c (sparc32_linux_step_trap): Likewise.
* sparcnbsd-tdep.c (sparcnbsd_step_trap): Likewise.
* sparc-tdep.c (sparc_address_from_register): Remove.
(sparc_analyze_control_transfer): Pass FRAME argument instead of
GDBARCH. Pass FRAME to step_trap callback.
(sparc_step_trap): Add FRAME argument.
(space_software_single_step): Replace REGCACHE by FRAME. Pass FRAME
to sparc_analyze_control_transfer. Read registers from FRAME instead
of calling sparc_address_from_register.
* sparc-tdep.h (struct gdbarch_tdep): Add FRAME argument to
step_trap callback.
(sparc_address_from_register): Remove prototype.
(sparc_software_single_step): Replace REGCACHE argument by FRAME.
(sparcnbsd_step_trap): Add FRAME argument.
* spu-tdep.c (spu_software_single_step): Replace REGCACHE argument
by FRAME. Read registers from FRAME instead of REGCACHE.
diff -urNp gdb-orig/gdb/alpha-tdep.c gdb-head/gdb/alpha-tdep.c
--- gdb-orig/gdb/alpha-tdep.c 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/alpha-tdep.c 2007-06-06 18:59:59.712617396 +0200
@@ -1397,14 +1397,13 @@ fp_register_sign_bit (LONGEST reg)
the target of the coming instruction and breakpoint it. */
static CORE_ADDR
-alpha_next_pc (CORE_ADDR pc)
+alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
unsigned int insn;
unsigned int op;
int regno;
int offset;
LONGEST rav;
- gdb_byte reg[ALPHA_REGISTER_SIZE];
insn = alpha_read_insn (pc);
@@ -1415,7 +1414,7 @@ alpha_next_pc (CORE_ADDR pc)
{
/* Jump format: target PC is:
RB & ~3 */
- return (read_register ((insn >> 16) & 0x1f) & ~3);
+ return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
}
if ((op & 0x30) == 0x30)
@@ -1446,8 +1445,7 @@ alpha_next_pc (CORE_ADDR pc)
regno += FP0_REGNUM;
}
- regcache_cooked_read (current_regcache, regno, reg);
- rav = extract_signed_integer (reg, ALPHA_REGISTER_SIZE);
+ rav = get_frame_register_signed (frame, regno);
switch (op)
{
@@ -1519,12 +1517,12 @@ alpha_next_pc (CORE_ADDR pc)
}
int
-alpha_software_single_step (struct regcache *regcache)
+alpha_software_single_step (struct frame_info *frame)
{
CORE_ADDR pc, next_pc;
- pc = read_pc ();
- next_pc = alpha_next_pc (pc);
+ pc = get_frame_pc (frame);
+ next_pc = alpha_next_pc (frame, pc);
insert_single_step_breakpoint (next_pc);
return 1;
diff -urNp gdb-orig/gdb/alpha-tdep.h gdb-head/gdb/alpha-tdep.h
--- gdb-orig/gdb/alpha-tdep.h 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/alpha-tdep.h 2007-06-06 18:59:59.716616820 +0200
@@ -109,7 +109,7 @@ struct gdbarch_tdep
};
extern unsigned int alpha_read_insn (CORE_ADDR pc);
-extern int alpha_software_single_step (struct regcache *regcache);
+extern int alpha_software_single_step (struct frame_info *frame);
extern CORE_ADDR alpha_after_prologue (CORE_ADDR pc);
extern void alpha_mdebug_init_abi (struct gdbarch_info, struct gdbarch *);
diff -urNp gdb-orig/gdb/arm-tdep.c gdb-head/gdb/arm-tdep.c
--- gdb-orig/gdb/arm-tdep.c 2007-06-06 18:59:45.404416232 +0200
+++ gdb-head/gdb/arm-tdep.c 2007-06-06 18:59:59.728615094 +0200
@@ -1543,8 +1543,8 @@ condition_true (unsigned long cond, unsi
#define ARM_PC_32 1
static unsigned long
-shifted_reg_val (unsigned long inst, int carry, unsigned long pc_val,
- unsigned long status_reg)
+shifted_reg_val (struct frame_info *frame, unsigned long inst, int carry,
+ unsigned long pc_val, unsigned long status_reg)
{
unsigned long res, shift;
int rm = bits (inst, 0, 3);
@@ -1553,7 +1553,8 @@ shifted_reg_val (unsigned long inst, int
if (bit (inst, 4))
{
int rs = bits (inst, 8, 11);
- shift = (rs == 15 ? pc_val + 8 : read_register (rs)) & 0xFF;
+ shift = (rs == 15 ? pc_val + 8
+ : get_frame_register_unsigned (frame, rs)) & 0xFF;
}
else
shift = bits (inst, 7, 11);
@@ -1561,7 +1562,7 @@ shifted_reg_val (unsigned long inst, int
res = (rm == 15
? ((pc_val | (ARM_PC_32 ? 0 : status_reg))
+ (bit (inst, 4) ? 12 : 8))
- : read_register (rm));
+ : get_frame_register_unsigned (frame, rm));
switch (shifttype)
{
@@ -1604,7 +1605,7 @@ bitcount (unsigned long val)
}
static CORE_ADDR
-thumb_get_next_pc (CORE_ADDR pc)
+thumb_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
unsigned long pc_val = ((unsigned long) pc) + 4; /* PC after prefetch */
unsigned short inst1 = read_memory_unsigned_integer (pc, 2);
@@ -1618,7 +1619,7 @@ thumb_get_next_pc (CORE_ADDR pc)
/* Fetch the saved PC from the stack. It's stored above
all of the other registers. */
offset = bitcount (bits (inst1, 0, 7)) * DEPRECATED_REGISTER_SIZE;
- sp = read_register (ARM_SP_REGNUM);
+ sp = get_frame_register_unsigned (frame, ARM_SP_REGNUM);
nextpc = (CORE_ADDR) read_memory_unsigned_integer (sp + offset, 4);
nextpc = ADDR_BITS_REMOVE (nextpc);
if (nextpc == pc)
@@ -1626,7 +1627,7 @@ thumb_get_next_pc (CORE_ADDR pc)
}
else if ((inst1 & 0xf000) == 0xd000) /* conditional branch */
{
- unsigned long status = read_register (ARM_PS_REGNUM);
+ unsigned long status = get_frame_register_unsigned (frame, ARM_PS_REGNUM);
unsigned long cond = bits (inst1, 8, 11);
if (cond != 0x0f && condition_true (cond, status)) /* 0x0f = SWI */
nextpc = pc_val + (sbits (inst1, 0, 7) << 1);
@@ -1649,7 +1650,7 @@ thumb_get_next_pc (CORE_ADDR pc)
if (bits (inst1, 3, 6) == 0x0f)
nextpc = pc_val;
else
- nextpc = read_register (bits (inst1, 3, 6));
+ nextpc = get_frame_register_unsigned (frame, bits (inst1, 3, 6));
nextpc = ADDR_BITS_REMOVE (nextpc);
if (nextpc == pc)
@@ -1660,7 +1661,7 @@ thumb_get_next_pc (CORE_ADDR pc)
}
static CORE_ADDR
-arm_get_next_pc (CORE_ADDR pc)
+arm_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
unsigned long pc_val;
unsigned long this_instr;
@@ -1668,11 +1669,11 @@ arm_get_next_pc (CORE_ADDR pc)
CORE_ADDR nextpc;
if (arm_pc_is_thumb (pc))
- return thumb_get_next_pc (pc);
+ return thumb_get_next_pc (frame, pc);
pc_val = (unsigned long) pc;
this_instr = read_memory_unsigned_integer (pc, 4);
- status = read_register (ARM_PS_REGNUM);
+ status = get_frame_register_unsigned (frame, ARM_PS_REGNUM);
nextpc = (CORE_ADDR) (pc_val + 4); /* Default case */
if (condition_true (bits (this_instr, 28, 31), status))
@@ -1700,7 +1701,8 @@ arm_get_next_pc (CORE_ADDR pc)
|| bits (this_instr, 4, 27) == 0x12fff3)
{
rn = bits (this_instr, 0, 3);
- result = (rn == 15) ? pc_val + 8 : read_register (rn);
+ result = (rn == 15) ? pc_val + 8
+ : get_frame_register_unsigned (frame, rn);
nextpc = (CORE_ADDR) ADDR_BITS_REMOVE (result);
if (nextpc == pc)
@@ -1712,7 +1714,8 @@ arm_get_next_pc (CORE_ADDR pc)
/* Multiply into PC */
c = (status & FLAG_C) ? 1 : 0;
rn = bits (this_instr, 16, 19);
- operand1 = (rn == 15) ? pc_val + 8 : read_register (rn);
+ operand1 = (rn == 15) ? pc_val + 8
+ : get_frame_register_unsigned (frame, rn);
if (bit (this_instr, 25))
{
@@ -1722,7 +1725,7 @@ arm_get_next_pc (CORE_ADDR pc)
& 0xffffffff;
}
else /* operand 2 is a shifted register */
- operand2 = shifted_reg_val (this_instr, c, pc_val, status);
+ operand2 = shifted_reg_val (frame, this_instr, c, pc_val, status);
switch (bits (this_instr, 21, 24))
{
@@ -1807,14 +1810,15 @@ arm_get_next_pc (CORE_ADDR pc)
/* byte write to PC */
rn = bits (this_instr, 16, 19);
- base = (rn == 15) ? pc_val + 8 : read_register (rn);
+ base = (rn == 15) ? pc_val + 8
+ : get_frame_register_unsigned (frame, rn);
if (bit (this_instr, 24))
{
/* pre-indexed */
int c = (status & FLAG_C) ? 1 : 0;
unsigned long offset =
(bit (this_instr, 25)
- ? shifted_reg_val (this_instr, c, pc_val, status)
+ ? shifted_reg_val (frame, this_instr, c, pc_val, status)
: bits (this_instr, 0, 11));
if (bit (this_instr, 23))
@@ -1856,7 +1860,8 @@ arm_get_next_pc (CORE_ADDR pc)
{
unsigned long rn_val =
- read_register (bits (this_instr, 16, 19));
+ get_frame_register_unsigned (frame,
+ bits (this_instr, 16, 19));
nextpc =
(CORE_ADDR) read_memory_integer ((CORE_ADDR) (rn_val
+ offset),
@@ -1905,13 +1910,13 @@ arm_get_next_pc (CORE_ADDR pc)
and breakpoint it. */
int
-arm_software_single_step (struct regcache *regcache)
+arm_software_single_step (struct frame_info *frame)
{
/* NOTE: This may insert the wrong breakpoint instruction when
single-stepping over a mode-changing instruction, if the
CPSR heuristics are used. */
- CORE_ADDR next_pc = arm_get_next_pc (read_register (ARM_PC_REGNUM));
+ CORE_ADDR next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
insert_single_step_breakpoint (next_pc);
return 1;
diff -urNp gdb-orig/gdb/arm-tdep.h gdb-head/gdb/arm-tdep.h
--- gdb-orig/gdb/arm-tdep.h 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/arm-tdep.h 2007-06-06 18:59:59.732614518 +0200
@@ -182,7 +182,7 @@ struct gdbarch_tdep
#define LOWEST_PC (gdbarch_tdep (current_gdbarch)->lowest_pc)
#endif
-int arm_software_single_step (struct regcache *);
+int arm_software_single_step (struct frame_info *);
/* Functions exported from armbsd-tdep.h. */
diff -urNp gdb-orig/gdb/cris-tdep.c gdb-head/gdb/cris-tdep.c
--- gdb-orig/gdb/cris-tdep.c 2007-06-06 18:56:53.846037573 +0200
+++ gdb-head/gdb/cris-tdep.c 2007-06-06 18:59:59.743612935 +0200
@@ -2059,7 +2059,7 @@ find_cris_op (unsigned short insn, inst_
actually an internal error. */
static int
-find_step_target (inst_env_type *inst_env)
+find_step_target (struct frame_info *frame, inst_env_type *inst_env)
{
int i;
int offset;
@@ -2068,12 +2068,14 @@ find_step_target (inst_env_type *inst_en
/* Create a local register image and set the initial state. */
for (i = 0; i < NUM_GENREGS; i++)
{
- inst_env->reg[i] = (unsigned long) read_register (i);
+ inst_env->reg[i] =
+ (unsigned long) get_frame_register_unsigned (frame, i);
}
offset = NUM_GENREGS;
for (i = 0; i < NUM_SPECREGS; i++)
{
- inst_env->preg[i] = (unsigned long) read_register (offset + i);
+ inst_env->preg[i] =
+ (unsigned long) get_frame_register_unsigned (frame, offset + i);
}
inst_env->branch_found = 0;
inst_env->slot_needed = 0;
@@ -2124,13 +2126,13 @@ find_step_target (inst_env_type *inst_en
Either one ordinary target or two targets for branches may be found. */
static int
-cris_software_single_step (struct regcache *regcache)
+cris_software_single_step (struct frame_info *frame)
{
inst_env_type inst_env;
/* Analyse the present instruction environment and insert
breakpoints. */
- int status = find_step_target (&inst_env);
+ int status = find_step_target (frame, &inst_env);
if (status == -1)
{
/* Could not find a target. Things are likely to go downhill
diff -urNp gdb-orig/gdb/gdbarch.c gdb-head/gdb/gdbarch.c
--- gdb-orig/gdb/gdbarch.c 2007-06-06 18:56:32.531912306 +0200
+++ gdb-head/gdb/gdbarch.c 2007-06-06 18:59:59.765609770 +0200
@@ -1341,8 +1341,8 @@ gdbarch_dump (struct gdbarch *current_gd
#ifdef SOFTWARE_SINGLE_STEP
fprintf_unfiltered (file,
"gdbarch_dump: %s # %s\n",
- "SOFTWARE_SINGLE_STEP(regcache)",
- XSTRING (SOFTWARE_SINGLE_STEP (regcache)));
+ "SOFTWARE_SINGLE_STEP(frame)",
+ XSTRING (SOFTWARE_SINGLE_STEP (frame)));
#endif
fprintf_unfiltered (file,
"gdbarch_dump: software_single_step = <0x%lx>\n",
@@ -3019,13 +3019,13 @@ gdbarch_software_single_step_p (struct g
}
int
-gdbarch_software_single_step (struct gdbarch *gdbarch, struct regcache *regcache)
+gdbarch_software_single_step (struct gdbarch *gdbarch, struct frame_info *frame)
{
gdb_assert (gdbarch != NULL);
gdb_assert (gdbarch->software_single_step != NULL);
if (gdbarch_debug >= 2)
fprintf_unfiltered (gdb_stdlog, "gdbarch_software_single_step called\n");
- return gdbarch->software_single_step (regcache);
+ return gdbarch->software_single_step (frame);
}
void
diff -urNp gdb-orig/gdb/gdbarch.h gdb-head/gdb/gdbarch.h
--- gdb-orig/gdb/gdbarch.h 2007-06-06 18:56:32.552909284 +0200
+++ gdb-head/gdb/gdbarch.h 2007-06-06 18:59:59.784607036 +0200
@@ -968,14 +968,14 @@ extern int gdbarch_software_single_step_
#define SOFTWARE_SINGLE_STEP_P() (gdbarch_software_single_step_p (current_gdbarch))
#endif
-typedef int (gdbarch_software_single_step_ftype) (struct regcache *regcache);
-extern int gdbarch_software_single_step (struct gdbarch *gdbarch, struct regcache *regcache);
+typedef int (gdbarch_software_single_step_ftype) (struct frame_info *frame);
+extern int gdbarch_software_single_step (struct gdbarch *gdbarch, struct frame_info *frame);
extern void set_gdbarch_software_single_step (struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step);
#if !defined (GDB_TM_FILE) && defined (SOFTWARE_SINGLE_STEP)
#error "Non multi-arch definition of SOFTWARE_SINGLE_STEP"
#endif
#if !defined (SOFTWARE_SINGLE_STEP)
-#define SOFTWARE_SINGLE_STEP(regcache) (gdbarch_software_single_step (current_gdbarch, regcache))
+#define SOFTWARE_SINGLE_STEP(frame) (gdbarch_software_single_step (current_gdbarch, frame))
#endif
/* Return non-zero if the processor is executing a delay slot and a
diff -urNp gdb-orig/gdb/gdbarch.sh gdb-head/gdb/gdbarch.sh
--- gdb-orig/gdb/gdbarch.sh 2007-06-06 18:56:32.574906119 +0200
+++ gdb-head/gdb/gdbarch.sh 2007-06-06 18:59:59.803604302 +0200
@@ -614,7 +614,7 @@ f:=:CORE_ADDR:smash_text_address:CORE_AD
#
# A return value of 1 means that the software_single_step breakpoints
# were inserted; 0 means they were not.
-F:=:int:software_single_step:struct regcache *regcache:regcache
+F:=:int:software_single_step:struct frame_info *frame:frame
# Return non-zero if the processor is executing a delay slot and a
# further single-step is needed before the instruction finishes.
diff -urNp gdb-orig/gdb/infrun.c gdb-head/gdb/infrun.c
--- gdb-orig/gdb/infrun.c 2007-06-06 17:37:29.977301000 +0200
+++ gdb-head/gdb/infrun.c 2007-06-06 18:59:59.814602720 +0200
@@ -539,7 +539,7 @@ a command like `return' or `jump' to con
if (SOFTWARE_SINGLE_STEP_P () && step)
{
/* Do it the hard way, w/temp breakpoints */
- if (SOFTWARE_SINGLE_STEP (current_regcache))
+ if (SOFTWARE_SINGLE_STEP (get_current_frame ()))
{
/* ...and don't ask hardware to do it. */
step = 0;
diff -urNp gdb-orig/gdb/mips-tdep.c gdb-head/gdb/mips-tdep.c
--- gdb-orig/gdb/mips-tdep.c 2007-06-06 18:59:45.602387744 +0200
+++ gdb-head/gdb/mips-tdep.c 2007-06-06 18:59:59.833599986 +0200
@@ -882,7 +882,7 @@ mips32_relative_offset (ULONGEST inst)
/* Determine where to set a single step breakpoint while considering
branch prediction. */
static CORE_ADDR
-mips32_next_pc (CORE_ADDR pc)
+mips32_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
unsigned long inst;
int op;
@@ -913,8 +913,8 @@ mips32_next_pc (CORE_ADDR pc)
int tf = itype_rt (inst) & 0x01;
int cnum = itype_rt (inst) >> 2;
int fcrcs =
- read_signed_register (mips_regnum (current_gdbarch)->
- fp_control_status);
+ get_frame_register_signed (frame, mips_regnum (current_gdbarch)->
+ fp_control_status);
int cond = ((fcrcs >> 24) & 0x0e) | ((fcrcs >> 23) & 0x01);
if (((cond >> cnum) & 0x01) == tf)
@@ -938,7 +938,7 @@ mips32_next_pc (CORE_ADDR pc)
case 8: /* JR */
case 9: /* JALR */
/* Set PC to that address */
- pc = read_signed_register (rtype_rs (inst));
+ pc = get_frame_register_signed (frame, rtype_rs (inst));
break;
default:
pc += 4;
@@ -955,7 +955,7 @@ mips32_next_pc (CORE_ADDR pc)
case 16: /* BLTZAL */
case 18: /* BLTZALL */
less_branch:
- if (read_signed_register (itype_rs (inst)) < 0)
+ if (get_frame_register_signed (frame, itype_rs (inst)) < 0)
pc += mips32_relative_offset (inst) + 4;
else
pc += 8; /* after the delay slot */
@@ -964,7 +964,7 @@ mips32_next_pc (CORE_ADDR pc)
case 3: /* BGEZL */
case 17: /* BGEZAL */
case 19: /* BGEZALL */
- if (read_signed_register (itype_rs (inst)) >= 0)
+ if (get_frame_register_signed (frame, itype_rs (inst)) >= 0)
pc += mips32_relative_offset (inst) + 4;
else
pc += 8; /* after the delay slot */
@@ -994,22 +994,22 @@ mips32_next_pc (CORE_ADDR pc)
break; /* The new PC will be alternate mode */
case 4: /* BEQ, BEQL */
equal_branch:
- if (read_signed_register (itype_rs (inst)) ==
- read_signed_register (itype_rt (inst)))
+ if (get_frame_register_signed (frame, itype_rs (inst)) ==
+ get_frame_register_signed (frame, itype_rt (inst)))
pc += mips32_relative_offset (inst) + 4;
else
pc += 8;
break;
case 5: /* BNE, BNEL */
neq_branch:
- if (read_signed_register (itype_rs (inst)) !=
- read_signed_register (itype_rt (inst)))
+ if (get_frame_register_signed (frame, itype_rs (inst)) !=
+ get_frame_register_signed (frame, itype_rt (inst)))
pc += mips32_relative_offset (inst) + 4;
else
pc += 8;
break;
case 6: /* BLEZ, BLEZL */
- if (read_signed_register (itype_rs (inst)) <= 0)
+ if (get_frame_register_signed (frame, itype_rs (inst)) <= 0)
pc += mips32_relative_offset (inst) + 4;
else
pc += 8;
@@ -1017,7 +1017,7 @@ mips32_next_pc (CORE_ADDR pc)
case 7:
default:
greater_branch: /* BGTZ, BGTZL */
- if (read_signed_register (itype_rs (inst)) > 0)
+ if (get_frame_register_signed (frame, itype_rs (inst)) > 0)
pc += mips32_relative_offset (inst) + 4;
else
pc += 8;
@@ -1198,7 +1198,7 @@ add_offset_16 (CORE_ADDR pc, int offset)
}
static CORE_ADDR
-extended_mips16_next_pc (CORE_ADDR pc,
+extended_mips16_next_pc (struct frame_info *frame, CORE_ADDR pc,
unsigned int extension, unsigned int insn)
{
int op = (insn >> 11);
@@ -1234,7 +1234,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
struct upk_mips16 upk;
int reg;
unpack_mips16 (pc, extension, insn, ritype, &upk);
- reg = read_signed_register (upk.regx);
+ reg = get_frame_register_signed (frame, upk.regx);
if (reg == 0)
pc += (upk.offset << 1) + 2;
else
@@ -1246,7 +1246,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
struct upk_mips16 upk;
int reg;
unpack_mips16 (pc, extension, insn, ritype, &upk);
- reg = read_signed_register (upk.regx);
+ reg = get_frame_register_signed (frame, upk.regx);
if (reg != 0)
pc += (upk.offset << 1) + 2;
else
@@ -1259,7 +1259,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
int reg;
unpack_mips16 (pc, extension, insn, i8type, &upk);
/* upk.regx contains the opcode */
- reg = read_signed_register (24); /* Test register is 24 */
+ reg = get_frame_register_signed (frame, 24); /* Test register is 24 */
if (((upk.regx == 0) && (reg == 0)) /* BTEZ */
|| ((upk.regx == 1) && (reg != 0))) /* BTNEZ */
/* pc = add_offset_16(pc,upk.offset) ; */
@@ -1293,7 +1293,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
reg = 31;
break; /* BOGUS Guess */
}
- pc = read_signed_register (reg);
+ pc = get_frame_register_signed (frame, reg);
}
else
pc += 2;
@@ -1305,7 +1305,7 @@ extended_mips16_next_pc (CORE_ADDR pc,
that. */
{
pc += 2;
- pc = extended_mips16_next_pc (pc, insn, fetch_mips_16 (pc));
+ pc = extended_mips16_next_pc (frame, pc, insn, fetch_mips_16 (pc));
break;
}
default:
@@ -1318,10 +1318,10 @@ extended_mips16_next_pc (CORE_ADDR pc,
}
static CORE_ADDR
-mips16_next_pc (CORE_ADDR pc)
+mips16_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
unsigned int insn = fetch_mips_16 (pc);
- return extended_mips16_next_pc (pc, 0, insn);
+ return extended_mips16_next_pc (frame, pc, 0, insn);
}
/* The mips_next_pc function supports single_step when the remote
@@ -1330,12 +1330,12 @@ mips16_next_pc (CORE_ADDR pc)
branch will go. This isnt hard because all the data is available.
The MIPS32 and MIPS16 variants are quite different */
static CORE_ADDR
-mips_next_pc (CORE_ADDR pc)
+mips_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
if (pc & 0x01)
- return mips16_next_pc (pc);
+ return mips16_next_pc (frame, pc);
else
- return mips32_next_pc (pc);
+ return mips32_next_pc (frame, pc);
}
struct mips_frame_cache
@@ -2188,12 +2188,12 @@ mips_addr_bits_remove (CORE_ADDR addr)
the target of the coming instruction and breakpoint it. */
int
-mips_software_single_step (struct regcache *regcache)
+mips_software_single_step (struct frame_info *frame)
{
CORE_ADDR pc, next_pc;
- pc = read_register (mips_regnum (current_gdbarch)->pc);
- next_pc = mips_next_pc (pc);
+ pc = get_frame_pc (frame);
+ next_pc = mips_next_pc (frame, pc);
insert_single_step_breakpoint (next_pc);
return 1;
diff -urNp gdb-orig/gdb/mips-tdep.h gdb-head/gdb/mips-tdep.h
--- gdb-orig/gdb/mips-tdep.h 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/mips-tdep.h 2007-06-06 18:59:59.837599410 +0200
@@ -95,7 +95,7 @@ enum
};
/* Single step based on where the current instruction will take us. */
-extern int mips_software_single_step (struct regcache *regcache);
+extern int mips_software_single_step (struct frame_info *frame);
/* Tell if the program counter value in MEMADDR is in a MIPS16
function. */
diff -urNp gdb-orig/gdb/rs6000-tdep.c gdb-head/gdb/rs6000-tdep.c
--- gdb-orig/gdb/rs6000-tdep.c 2007-06-06 18:56:32.773877488 +0200
+++ gdb-head/gdb/rs6000-tdep.c 2007-06-06 18:59:59.847597971 +0200
@@ -118,8 +118,8 @@ CORE_ADDR (*rs6000_find_toc_address_hook
/* Static function prototypes */
-static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
- CORE_ADDR safety);
+static CORE_ADDR branch_dest (struct frame_info *frame, int opcode,
+ int instr, CORE_ADDR pc, CORE_ADDR safety);
static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
struct rs6000_framedata *);
@@ -624,8 +624,10 @@ rs6000_fetch_pointer_argument (struct fr
/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
static CORE_ADDR
-branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
+branch_dest (struct frame_info *frame, int opcode, int instr,
+ CORE_ADDR pc, CORE_ADDR safety)
{
+ struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
CORE_ADDR dest;
int immediate;
int absolute;
@@ -656,32 +658,26 @@ branch_dest (int opcode, int instr, CORE
if (ext_op == 16) /* br conditional register */
{
- dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
+ dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
/* If we are about to return from a signal handler, dest is
something like 0x3c90. The current frame is a signal handler
caller frame, upon completion of the sigreturn system call
execution will return to the saved PC in the frame. */
- if (dest < gdbarch_tdep (current_gdbarch)->text_segment_base)
- {
- struct frame_info *fi;
-
- fi = get_current_frame ();
- if (fi != NULL)
- dest = read_memory_addr (get_frame_base (fi) + SIG_FRAME_PC_OFFSET,
- gdbarch_tdep (current_gdbarch)->wordsize);
- }
+ if (dest < tdep->text_segment_base)
+ dest = read_memory_addr (get_frame_base (frame) + SIG_FRAME_PC_OFFSET,
+ tdep->wordsize);
}
else if (ext_op == 528) /* br cond to count reg */
{
- dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3;
+ dest = get_frame_register_unsigned (frame, tdep->ppc_ctr_regnum) & ~3;
/* If we are about to execute a system call, dest is something
like 0x22fc or 0x3b00. Upon completion the system call
will return to the address in the link register. */
- if (dest < gdbarch_tdep (current_gdbarch)->text_segment_base)
- dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3;
+ if (dest < tdep->text_segment_base)
+ dest = get_frame_register_unsigned (frame, tdep->ppc_lr_regnum) & ~3;
}
else
return -1;
@@ -690,7 +686,7 @@ branch_dest (int opcode, int instr, CORE
default:
return -1;
}
- return (dest < gdbarch_tdep (current_gdbarch)->text_segment_base) ? safety : dest;
+ return (dest < tdep->text_segment_base) ? safety : dest;
}
@@ -725,9 +721,9 @@ rs6000_breakpoint_from_pc (CORE_ADDR *bp
the sequence. */
static int
-deal_with_atomic_sequence (struct regcache *regcache)
+deal_with_atomic_sequence (struct frame_info *frame)
{
- CORE_ADDR pc = read_pc ();
+ CORE_ADDR pc = get_frame_pc (frame);
CORE_ADDR breaks[2] = {-1, -1};
CORE_ADDR loc = pc;
CORE_ADDR branch_bp; /* Breakpoint at branch instruction's destination. */
@@ -762,7 +758,7 @@ deal_with_atomic_sequence (struct regcac
to the standard single-step code. */
opcode = insn >> 26;
- branch_bp = branch_dest (opcode, insn, pc, breaks[0]);
+ branch_bp = branch_dest (frame, opcode, insn, pc, breaks[0]);
if (branch_bp != -1)
{
@@ -807,7 +803,7 @@ deal_with_atomic_sequence (struct regcac
/* AIX does not support PT_STEP. Simulate it. */
int
-rs6000_software_single_step (struct regcache *regcache)
+rs6000_software_single_step (struct frame_info *frame)
{
CORE_ADDR dummy;
int breakp_sz;
@@ -817,16 +813,16 @@ rs6000_software_single_step (struct regc
CORE_ADDR breaks[2];
int opcode;
- loc = read_pc ();
+ loc = get_frame_pc (frame);
insn = read_memory_integer (loc, 4);
- if (deal_with_atomic_sequence (regcache))
+ if (deal_with_atomic_sequence (frame))
return 1;
breaks[0] = loc + breakp_sz;
opcode = insn >> 26;
- breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
+ breaks[1] = branch_dest (frame, opcode, insn, loc, breaks[0]);
/* Don't put two breakpoints on the same address. */
if (breaks[1] == breaks[0])
@@ -961,13 +957,18 @@ store_param_on_stack_p (unsigned long op
static int
bl_to_blrl_insn_p (CORE_ADDR pc, int insn)
{
- const int opcode = 18;
- const CORE_ADDR dest = branch_dest (opcode, insn, pc, -1);
+ CORE_ADDR dest;
+ int immediate;
+ int absolute;
int dest_insn;
- if (dest == -1)
- return 0; /* Should never happen, but just return zero to be safe. */
-
+ absolute = (int) ((insn >> 1) & 1);
+ immediate = ((insn & ~3) << 6) >> 6;
+ if (absolute)
+ dest = immediate;
+ else
+ dest = pc + immediate;
+
dest_insn = read_memory_integer (dest, 4);
if ((dest_insn & 0xfc00ffff) == 0x4c000021) /* blrl */
return 1;
diff -urNp gdb-orig/gdb/rs6000-tdep.h gdb-head/gdb/rs6000-tdep.h
--- gdb-orig/gdb/rs6000-tdep.h 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/rs6000-tdep.h 2007-06-06 18:59:59.852597252 +0200
@@ -21,7 +21,7 @@
#include "defs.h"
-extern int rs6000_software_single_step (struct regcache *regcache);
+extern int rs6000_software_single_step (struct frame_info *frame);
/* Hook in rs6000-tdep.c for determining the TOC address when
calling functions in the inferior. */
diff -urNp gdb-orig/gdb/sparc64-linux-tdep.c gdb-head/gdb/sparc64-linux-tdep.c
--- gdb-orig/gdb/sparc64-linux-tdep.c 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/sparc64-linux-tdep.c 2007-06-06 18:59:59.856596677 +0200
@@ -106,14 +106,11 @@ sparc64_linux_sigframe_init (const struc
address. */
static CORE_ADDR
-sparc64_linux_step_trap (unsigned long insn)
+sparc64_linux_step_trap (struct frame_info *frame, unsigned long insn)
{
if (insn == 0x91d0206d)
{
- ULONGEST sp;
-
- regcache_cooked_read_unsigned (current_regcache,
- SPARC_SP_REGNUM, &sp);
+ ULONGEST sp = get_frame_register_unsigned (frame, SPARC_SP_REGNUM);
if (sp & 1)
sp += BIAS;
diff -urNp gdb-orig/gdb/sparc-linux-tdep.c gdb-head/gdb/sparc-linux-tdep.c
--- gdb-orig/gdb/sparc-linux-tdep.c 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/sparc-linux-tdep.c 2007-06-06 18:59:59.860596101 +0200
@@ -131,22 +131,18 @@ sparc32_linux_sigframe_init (const struc
address. */
static CORE_ADDR
-sparc32_linux_step_trap (unsigned long insn)
+sparc32_linux_step_trap (struct frame_info *frame, unsigned long insn)
{
if (insn == 0x91d02010)
{
- ULONGEST sc_num;
-
- regcache_cooked_read_unsigned (current_regcache,
- SPARC_G1_REGNUM, &sc_num);
+ ULONGEST sc_num = get_frame_register_unsigned (frame, SPARC_G1_REGNUM);
/* __NR_rt_sigreturn is 101 and __NR_sigreturn is 216 */
if (sc_num == 101 || sc_num == 216)
{
ULONGEST sp, pc_offset;
- regcache_cooked_read_unsigned (current_regcache,
- SPARC_SP_REGNUM, &sp);
+ sp = get_frame_register_unsigned (frame, SPARC_SP_REGNUM);
/* The kernel puts the sigreturn registers on the stack,
and this is where the signal unwinding state is take from
diff -urNp gdb-orig/gdb/sparcnbsd-tdep.c gdb-head/gdb/sparcnbsd-tdep.c
--- gdb-orig/gdb/sparcnbsd-tdep.c 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/sparcnbsd-tdep.c 2007-06-06 18:59:59.864595525 +0200
@@ -265,21 +265,18 @@ sparc32nbsd_sigtramp_frame_sniffer (stru
address. */
CORE_ADDR
-sparcnbsd_step_trap (unsigned long insn)
+sparcnbsd_step_trap (struct frame_info *frame, unsigned long insn)
{
if ((X_I (insn) == 0 && X_RS1 (insn) == 0 && X_RS2 (insn) == 0)
|| (X_I (insn) == 1 && X_RS1 (insn) == 0 && (insn & 0x7f) == 0))
{
/* "New" system call. */
- ULONGEST number;
-
- regcache_cooked_read_unsigned (current_regcache,
- SPARC_G1_REGNUM, &number);
+ ULONGEST number = get_frame_register_unsigned (frame, SPARC_G1_REGNUM);
if (number & 0x400)
- return sparc_address_from_register (SPARC_G2_REGNUM);
+ return get_frame_register_unsigned (frame, SPARC_G2_REGNUM);
if (number & 0x800)
- return sparc_address_from_register (SPARC_G7_REGNUM);
+ return get_frame_register_unsigned (frame, SPARC_G7_REGNUM);
}
return 0;
diff -urNp gdb-orig/gdb/sparc-tdep.c gdb-head/gdb/sparc-tdep.c
--- gdb-orig/gdb/sparc-tdep.c 2007-06-06 18:56:32.850866409 +0200
+++ gdb-head/gdb/sparc-tdep.c 2007-06-06 18:59:59.871594518 +0200
@@ -170,18 +170,6 @@ sparc_fetch_wcookie (void)
}
-/* Return the contents if register REGNUM as an address. */
-
-CORE_ADDR
-sparc_address_from_register (int regnum)
-{
- ULONGEST addr;
-
- regcache_cooked_read_unsigned (current_regcache, regnum, &addr);
- return addr;
-}
-
-
/* The functions on this page are intended to be used to classify
function arguments. */
@@ -1249,7 +1237,7 @@ sparc32_dwarf2_frame_init_reg (struct gd
software single-step mechanism. */
static CORE_ADDR
-sparc_analyze_control_transfer (struct gdbarch *arch,
+sparc_analyze_control_transfer (struct frame_info *frame,
CORE_ADDR pc, CORE_ADDR *npc)
{
unsigned long insn = sparc_fetch_instruction (pc);
@@ -1291,7 +1279,7 @@ sparc_analyze_control_transfer (struct g
else if (X_OP (insn) == 2 && X_OP3 (insn) == 0x3a)
{
/* Trap instruction (TRAP). */
- return gdbarch_tdep (arch)->step_trap (insn);
+ return gdbarch_tdep (get_frame_arch (frame))->step_trap (frame, insn);
}
/* FIXME: Handle DONE and RETRY instructions. */
@@ -1324,25 +1312,25 @@ sparc_analyze_control_transfer (struct g
}
static CORE_ADDR
-sparc_step_trap (unsigned long insn)
+sparc_step_trap (struct frame_info *frame, unsigned long insn)
{
return 0;
}
int
-sparc_software_single_step (struct regcache *regcache)
+sparc_software_single_step (struct frame_info *frame)
{
- struct gdbarch *arch = current_gdbarch;
+ struct gdbarch *arch = get_frame_arch (frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (arch);
CORE_ADDR npc, nnpc;
CORE_ADDR pc, orig_npc;
- pc = sparc_address_from_register (tdep->pc_regnum);
- orig_npc = npc = sparc_address_from_register (tdep->npc_regnum);
+ pc = get_frame_register_unsigned (frame, tdep->pc_regnum);
+ orig_npc = npc = get_frame_register_unsigned (frame, tdep->npc_regnum);
/* Analyze the instruction at PC. */
- nnpc = sparc_analyze_control_transfer (arch, pc, &npc);
+ nnpc = sparc_analyze_control_transfer (frame, pc, &npc);
if (npc != 0)
insert_single_step_breakpoint (npc);
diff -urNp gdb-orig/gdb/sparc-tdep.h gdb-head/gdb/sparc-tdep.h
--- gdb-orig/gdb/sparc-tdep.h 2007-06-04 22:23:19.000000000 +0200
+++ gdb-head/gdb/sparc-tdep.h 2007-06-06 18:59:59.875593943 +0200
@@ -67,7 +67,7 @@ struct gdbarch_tdep
size_t plt_entry_size;
/* Alternative location for trap return. Used for single-stepping. */
- CORE_ADDR (*step_trap) (unsigned long insn);
+ CORE_ADDR (*step_trap) (struct frame_info *frame, unsigned long insn);
};
/* Register numbers of various important registers. */
@@ -150,9 +150,6 @@ struct sparc_frame_cache
/* Fetch the instruction at PC. */
extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);
-/* Return the contents if register REGNUM as an address. */
-extern CORE_ADDR sparc_address_from_register (int regnum);
-
/* Fetch StackGhost Per-Process XOR cookie. */
extern ULONGEST sparc_fetch_wcookie (void);
@@ -167,7 +164,7 @@ extern struct sparc_frame_cache *
-extern int sparc_software_single_step (struct regcache *regcache);
+extern int sparc_software_single_step (struct frame_info *frame);
extern void sparc_supply_rwindow (struct regcache *regcache,
CORE_ADDR sp, int regnum);
@@ -205,7 +202,8 @@ extern const struct sparc_gregset sparc3
/* Return the address of a system call's alternative return
address. */
-extern CORE_ADDR sparcnbsd_step_trap (unsigned long insn);
+extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
+ unsigned long insn);
extern void sparc32nbsd_elf_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch);
diff -urNp gdb-orig/gdb/spu-tdep.c gdb-head/gdb/spu-tdep.c
--- gdb-orig/gdb/spu-tdep.c 2007-06-06 18:56:32.857865402 +0200
+++ gdb-head/gdb/spu-tdep.c 2007-06-06 18:59:59.881593079 +0200
@@ -1089,16 +1089,14 @@ spu_breakpoint_from_pc (CORE_ADDR * pcpt
/* Software single-stepping support. */
int
-spu_software_single_step (struct regcache *regcache)
+spu_software_single_step (struct frame_info *frame)
{
CORE_ADDR pc, next_pc;
unsigned int insn;
int offset, reg;
gdb_byte buf[4];
- regcache_cooked_read (regcache, SPU_PC_REGNUM, buf);
- /* Mask off interrupt enable bit. */
- pc = extract_unsigned_integer (buf, 4) & -4;
+ pc = get_frame_pc (frame);
if (target_read_memory (pc, buf, 4))
return 1;
@@ -1122,7 +1120,7 @@ spu_software_single_step (struct regcach
target += pc;
else if (reg != -1)
{
- regcache_cooked_read_part (regcache, reg, 0, 4, buf);
+ get_frame_register_bytes (frame, reg, 0, 4, buf);
target += extract_unsigned_integer (buf, 4) & -4;
}
--
Dr. Ulrich Weigand
GNU Toolchain for Linux on System z and Cell BE
Ulrich.Weigand@de.ibm.com