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Re: [rfc][3/3] gdbserver bi-arch for ppc: enable bi-arch support
- From: Daniel Jacobowitz <drow at false dot org>
- To: Ulrich Weigand <uweigand at de dot ibm dot com>
- Cc: gdb-patches at sourceware dot org
- Date: Wed, 27 Feb 2008 08:19:10 -0500
- Subject: Re: [rfc][3/3] gdbserver bi-arch for ppc: enable bi-arch support
- References: <200802080111.m181BMCL008752@d12av02.megacenter.de.ibm.com>
On Fri, Feb 08, 2008 at 02:11:22AM +0100, Ulrich Weigand wrote:
> + /* Only if the high bit of the MSR is set, we actually have
> + a 64-bit inferior. */
> +#ifdef __ALTIVEC__
> + collect_register_by_name ("msr", &msr);
> +#else
> + collect_register_by_name ("ps", &msr);
> +#endif
> + if (msr < 0)
> + return;
> +#endif
This #ifdef can go away; in the manually written regformats files,
calls to collect_register_by_name are the only thing that rely on
the register name, so you could just rename it to msr.
Otherwise OK.
> + /* OK, we have a 32-bit inferior. */
> +#ifdef __ALTIVEC__
> + init_registers_powerpc_32 ();
> +#else
> +#ifdef __SPE__
> + init_registers_powerpc_e500 ();
> +#else
> + init_registers_ppc ();
> +#endif
> +#endif
I hope we can autodetect AltiVec and SPE too... Maybe we have to
resort to checking the inferior's auxv?
--
Daniel Jacobowitz
CodeSourcery