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[PATCH-ppc 0/5] Add feature description for new VSX register set
- From: Luis Machado <luisgpm at linux dot vnet dot ibm dot com>
- To: gdb-patches at sourceware dot org
- Date: Fri, 25 Jul 2008 17:15:34 -0300
- Subject: [PATCH-ppc 0/5] Add feature description for new VSX register set
- Reply-to: luisgpm at linux dot vnet dot ibm dot com
Hi folks,
This is a patch series to enable POWER7 VSX register set support in GDB.
The VSX registers' layout is as follows:
VSR doubleword 0 VSR doubleword 1
----------------------------------------------------------------
VSR[0] | FPR[0] | |
----------------------------------------------------------------
VSR[1] | FPR[1] | |
----------------------------------------------------------------
| ... | |
| ... | |
----------------------------------------------------------------
VSR[30] | FPR[30] | |
----------------------------------------------------------------
VSR[31] | FPR[31] | |
----------------------------------------------------------------
VSR[32] | FPR[32] VR[0] |
----------------------------------------------------------------
VSR[33] | FPR[33] VR[1] |
----------------------------------------------------------------
| ... |
| ... |
----------------------------------------------------------------
VSR[62] | FPR[62] VR[30] |
----------------------------------------------------------------
VSR[63] | FPR[63] VR[31] |
----------------------------------------------------------------
The VSX register set is composed of 64 128-bit wide registers. As we can
see from the picture, doublewords 0 of VSR0~VSR31 overlap with the
existing FP0~FP31 registers. VSR32~VSR63 overlap with the existing
VMX/Altivec registers. There is also a new set of FP registers, the
Extended FPR's (F32~F63) that overlap with existing VMX/Altivec
registers.
The only new storage space is doubleword 1 of VSR0~VSR31, which we
handle separately. The other parts of the VSX registers are handled via
pseudo-registers.
This specific patch adds 32 new 64-bit wide "vsxh" (doubleword 1 of
VSR0~VSR31) registers and addresses the required dependencies in the
makefiles.
4 new feature sets were created:
* PPC32 + VSX
* PPC32L + VSX
* PPC64 + VSX
* PPC64L + VSX
---
2008-07-25 Luis Machado <luisgpm@br.ibm.com>
* features/res6000/power-vsx.xml: New VSX descriptions.
* features/res6000/powerpc-vsx32.xml: New file.
* features/res6000/powerpc-vsx32l.xml: New file.
* features/res6000/powerpc-vsx64.xml: New file.
* features/res6000/powerpc-vsx64l.xml: New file.
* features/res6000/powerpc-vsx32.c: New file (generated).
* features/res6000/powerpc-vsx32l.c: New file (generated).
* features/res6000/powerpc-vsx64.c: New file (generated).
* features/res6000/powerpc-vsx64l.c: New file (generated).
* features/Makefile: Updated with new descriptions.
* regformats/rs6000/powerpc-vsx32l.dat: New file (generated).
* regformats/rs6000/powerpc-vsx64l.dat: New file (generated).
* Makefile: Updated with new descriptions.
Index: gdb/features/rs6000/power-vsx.xml
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/power-vsx.xml 2008-07-25 08:26:10.000000000 -0700
@@ -0,0 +1,44 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- POWER7 VSX registers that do not overlap existing FP and VMX
+ registers. -->
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.power.vsx">
+ <reg name="vs0h" bitsize="64" type="uint64"/>
+ <reg name="vs1h" bitsize="64" type="uint64"/>
+ <reg name="vs2h" bitsize="64" type="uint64"/>
+ <reg name="vs3h" bitsize="64" type="uint64"/>
+ <reg name="vs4h" bitsize="64" type="uint64"/>
+ <reg name="vs5h" bitsize="64" type="uint64"/>
+ <reg name="vs6h" bitsize="64" type="uint64"/>
+ <reg name="vs7h" bitsize="64" type="uint64"/>
+ <reg name="vs8h" bitsize="64" type="uint64"/>
+ <reg name="vs9h" bitsize="64" type="uint64"/>
+ <reg name="vs10h" bitsize="64" type="uint64"/>
+ <reg name="vs11h" bitsize="64" type="uint64"/>
+ <reg name="vs12h" bitsize="64" type="uint64"/>
+ <reg name="vs13h" bitsize="64" type="uint64"/>
+ <reg name="vs14h" bitsize="64" type="uint64"/>
+ <reg name="vs15h" bitsize="64" type="uint64"/>
+ <reg name="vs16h" bitsize="64" type="uint64"/>
+ <reg name="vs17h" bitsize="64" type="uint64"/>
+ <reg name="vs18h" bitsize="64" type="uint64"/>
+ <reg name="vs19h" bitsize="64" type="uint64"/>
+ <reg name="vs20h" bitsize="64" type="uint64"/>
+ <reg name="vs21h" bitsize="64" type="uint64"/>
+ <reg name="vs22h" bitsize="64" type="uint64"/>
+ <reg name="vs23h" bitsize="64" type="uint64"/>
+ <reg name="vs24h" bitsize="64" type="uint64"/>
+ <reg name="vs25h" bitsize="64" type="uint64"/>
+ <reg name="vs26h" bitsize="64" type="uint64"/>
+ <reg name="vs27h" bitsize="64" type="uint64"/>
+ <reg name="vs28h" bitsize="64" type="uint64"/>
+ <reg name="vs29h" bitsize="64" type="uint64"/>
+ <reg name="vs30h" bitsize="64" type="uint64"/>
+ <reg name="vs31h" bitsize="64" type="uint64"/>
+</feature>
Index: gdb/features/Makefile
===================================================================
--- gdb.orig/features/Makefile 2008-07-25 07:31:44.000000000 -0700
+++ gdb/features/Makefile 2008-07-25 08:24:19.000000000 -0700
@@ -33,7 +33,8 @@
WHICH = arm-with-iwmmxt mips-linux mips64-linux \
rs6000/powerpc-32l rs6000/powerpc-altivec32l rs6000/powerpc-e500l \
- rs6000/powerpc-64l rs6000/powerpc-altivec64l
+ rs6000/powerpc-64l rs6000/powerpc-altivec64l rs6000/powerpc-vsx32l \
+ rs6000/powerpc-vsx64l
# Record which registers should be sent to GDB by default after stop.
arm-with-iwmmxt-expedite = r11,sp,pc
@@ -41,9 +42,12 @@
mips64-linux-expedite = r29,pc
rs6000/powerpc-32l-expedite = r1,pc
rs6000/powerpc-altivec32l-expedite = r1,pc
+rs6000/powerpc-vsx32l-expedite = r1,pc
rs6000/powerpc-e500l-expedite = r1,pc
rs6000/powerpc-64l-expedite = r1,pc
rs6000/powerpc-altivec64l-expedite = r1,pc
+rs6000/powerpc-vsx64l-expedite = r1,pc
+
XSLTPROC = xsltproc
outdir = ../regformats
Index: gdb/features/rs6000/powerpc-vsx32.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx32.c 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,198 @@
+/* THIS FILE IS GENERATED. Original: powerpc-vsx32.xml */
+
+#include "defs.h"
+#include "gdbtypes.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_powerpc_vsx32;
+static void
+initialize_tdesc_powerpc_vsx32 (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
+ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4f");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int32");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4i32");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int16");
+ type = init_vector_type (field_type, 8);
+ TYPE_NAME (type) = xstrdup ("v8i16");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int8");
+ type = init_vector_type (field_type, 16);
+ TYPE_NAME (type) = xstrdup ("v16i8");
+ tdesc_record_type (feature, type);
+
+ type = init_composite_type (NULL, TYPE_CODE_UNION);
+ TYPE_NAME (type) = xstrdup ("vec128");
+ field_type = tdesc_named_type (feature, "uint128");
+ append_composite_type_field (type, xstrdup ("uint128"), field_type);
+ field_type = tdesc_named_type (feature, "v4f");
+ append_composite_type_field (type, xstrdup ("v4_float"), field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ append_composite_type_field (type, xstrdup ("v4_int32"), field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ append_composite_type_field (type, xstrdup ("v8_int16"), field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ append_composite_type_field (type, xstrdup ("v16_int8"), field_type);
+ TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR;
+ tdesc_record_type (feature, type);
+
+ tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int");
+ tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx");
+ tdesc_create_reg (feature, "vs0h", 105, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs1h", 106, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs2h", 107, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs3h", 108, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs4h", 109, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs5h", 110, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs6h", 111, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs7h", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs8h", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs9h", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs10h", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs11h", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs12h", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs13h", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs14h", 119, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs15h", 120, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs16h", 121, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs17h", 122, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs18h", 123, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs19h", 124, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs20h", 125, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs21h", 126, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs22h", 127, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs23h", 128, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs24h", 129, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs25h", 130, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs26h", 131, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs27h", 132, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs28h", 133, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs29h", 134, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs30h", 135, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs31h", 136, 1, NULL, 64, "uint64");
+
+ tdesc_powerpc_vsx32 = result;
+}
Index: gdb/features/rs6000/powerpc-vsx32.xml
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx32.xml 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,18 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
+ view of the PowerPC. Includes AltiVec vector registers. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>powerpc:common</architecture>
+ <xi:include href="power-core.xml"/>
+ <xi:include href="power-fpu.xml"/>
+ <xi:include href="power-altivec.xml"/>
+ <xi:include href="power-vsx.xml"/>
+</target>
Index: gdb/features/rs6000/powerpc-vsx32l.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx32l.c 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,202 @@
+/* THIS FILE IS GENERATED. Original: powerpc-vsx32l.xml */
+
+#include "defs.h"
+#include "gdbtypes.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_powerpc_vsx32l;
+static void
+initialize_tdesc_powerpc_vsx32l (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "pc", 64, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "msr", 65, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "lr", 67, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
+ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux");
+ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 32, "int");
+ tdesc_create_reg (feature, "trap", 72, 1, NULL, 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4f");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int32");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4i32");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int16");
+ type = init_vector_type (field_type, 8);
+ TYPE_NAME (type) = xstrdup ("v8i16");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int8");
+ type = init_vector_type (field_type, 16);
+ TYPE_NAME (type) = xstrdup ("v16i8");
+ tdesc_record_type (feature, type);
+
+ type = init_composite_type (NULL, TYPE_CODE_UNION);
+ TYPE_NAME (type) = xstrdup ("vec128");
+ field_type = tdesc_named_type (feature, "uint128");
+ append_composite_type_field (type, xstrdup ("uint128"), field_type);
+ field_type = tdesc_named_type (feature, "v4f");
+ append_composite_type_field (type, xstrdup ("v4_float"), field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ append_composite_type_field (type, xstrdup ("v4_int32"), field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ append_composite_type_field (type, xstrdup ("v8_int16"), field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ append_composite_type_field (type, xstrdup ("v16_int8"), field_type);
+ TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR;
+ tdesc_record_type (feature, type);
+
+ tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int");
+ tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx");
+ tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64");
+
+ tdesc_powerpc_vsx32l = result;
+}
Index: gdb/features/rs6000/powerpc-vsx32l.xml
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx32l.xml 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,20 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
+ view of the PowerPC. Includes Linux-only special "registers" and AltiVec
+ vector registers. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>powerpc:common</architecture>
+ <xi:include href="power-core.xml"/>
+ <xi:include href="power-fpu.xml"/>
+ <xi:include href="power-linux.xml"/>
+ <xi:include href="power-altivec.xml"/>
+ <xi:include href="power-vsx.xml"/>
+</target>
Index: gdb/features/rs6000/powerpc-vsx64.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx64.c 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,198 @@
+/* THIS FILE IS GENERATED. Original: powerpc-vsx64.xml */
+
+#include "defs.h"
+#include "gdbtypes.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_powerpc_vsx64;
+static void
+initialize_tdesc_powerpc_vsx64 (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
+ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4f");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int32");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4i32");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int16");
+ type = init_vector_type (field_type, 8);
+ TYPE_NAME (type) = xstrdup ("v8i16");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int8");
+ type = init_vector_type (field_type, 16);
+ TYPE_NAME (type) = xstrdup ("v16i8");
+ tdesc_record_type (feature, type);
+
+ type = init_composite_type (NULL, TYPE_CODE_UNION);
+ TYPE_NAME (type) = xstrdup ("vec128");
+ field_type = tdesc_named_type (feature, "uint128");
+ append_composite_type_field (type, xstrdup ("uint128"), field_type);
+ field_type = tdesc_named_type (feature, "v4f");
+ append_composite_type_field (type, xstrdup ("v4_float"), field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ append_composite_type_field (type, xstrdup ("v4_int32"), field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ append_composite_type_field (type, xstrdup ("v8_int16"), field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ append_composite_type_field (type, xstrdup ("v16_int8"), field_type);
+ TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR;
+ tdesc_record_type (feature, type);
+
+ tdesc_create_reg (feature, "vr0", 71, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr1", 72, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr2", 73, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr3", 74, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr4", 75, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr5", 76, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr6", 77, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr7", 78, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr8", 79, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr9", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr10", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr11", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr12", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr13", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr14", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr15", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr16", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr17", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr18", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr19", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr20", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr21", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr22", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr23", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr24", 95, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr25", 96, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr26", 97, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr27", 98, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr28", 99, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr29", 100, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr30", 101, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr31", 102, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vscr", 103, 1, "vector", 32, "int");
+ tdesc_create_reg (feature, "vrsave", 104, 1, "vector", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx");
+ tdesc_create_reg (feature, "vs0h", 105, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs1h", 106, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs2h", 107, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs3h", 108, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs4h", 109, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs5h", 110, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs6h", 111, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs7h", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs8h", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs9h", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs10h", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs11h", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs12h", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs13h", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs14h", 119, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs15h", 120, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs16h", 121, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs17h", 122, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs18h", 123, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs19h", 124, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs20h", 125, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs21h", 126, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs22h", 127, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs23h", 128, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs24h", 129, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs25h", 130, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs26h", 131, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs27h", 132, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs28h", 133, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs29h", 134, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs30h", 135, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs31h", 136, 1, NULL, 64, "uint64");
+
+ tdesc_powerpc_vsx64 = result;
+}
Index: gdb/features/rs6000/powerpc-vsx64.xml
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx64.xml 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,18 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
+ view of the PowerPC. Includes AltiVec vector registers. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>powerpc:common64</architecture>
+ <xi:include href="power64-core.xml"/>
+ <xi:include href="power-fpu.xml"/>
+ <xi:include href="power-altivec.xml"/>
+ <xi:include href="power-vsx.xml"/>
+</target>
Index: gdb/features/rs6000/powerpc-vsx64l.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx64l.c 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,202 @@
+/* THIS FILE IS GENERATED. Original: powerpc-vsx64l.xml */
+
+#include "defs.h"
+#include "gdbtypes.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_powerpc_vsx64l;
+static void
+initialize_tdesc_powerpc_vsx64l (void)
+{
+ struct target_desc *result = allocate_target_description ();
+ struct tdesc_feature *feature;
+ struct type *field_type, *type;
+
+ set_tdesc_architecture (result, bfd_scan_arch ("powerpc:common64"));
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.core");
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "msr", 65, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "cr", 66, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "lr", 67, 1, NULL, 64, "code_ptr");
+ tdesc_create_reg (feature, "ctr", 68, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "xer", 69, 1, NULL, 32, "uint32");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.fpu");
+ tdesc_create_reg (feature, "f0", 32, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f1", 33, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f2", 34, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f3", 35, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f4", 36, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f5", 37, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f6", 38, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f7", 39, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f8", 40, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f9", 41, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f10", 42, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f11", 43, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f12", 44, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f13", 45, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f14", 46, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f15", 47, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f16", 48, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f17", 49, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f18", 50, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f19", 51, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f20", 52, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f21", 53, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f22", 54, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f23", 55, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f24", 56, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f25", 57, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f26", 58, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f27", 59, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f28", 60, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f29", 61, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f30", 62, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "f31", 63, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "fpscr", 70, 1, "float", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.linux");
+ tdesc_create_reg (feature, "orig_r3", 71, 1, NULL, 64, "int");
+ tdesc_create_reg (feature, "trap", 72, 1, NULL, 64, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.altivec");
+ field_type = tdesc_named_type (feature, "ieee_single");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4f");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int32");
+ type = init_vector_type (field_type, 4);
+ TYPE_NAME (type) = xstrdup ("v4i32");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int16");
+ type = init_vector_type (field_type, 8);
+ TYPE_NAME (type) = xstrdup ("v8i16");
+ tdesc_record_type (feature, type);
+
+ field_type = tdesc_named_type (feature, "int8");
+ type = init_vector_type (field_type, 16);
+ TYPE_NAME (type) = xstrdup ("v16i8");
+ tdesc_record_type (feature, type);
+
+ type = init_composite_type (NULL, TYPE_CODE_UNION);
+ TYPE_NAME (type) = xstrdup ("vec128");
+ field_type = tdesc_named_type (feature, "uint128");
+ append_composite_type_field (type, xstrdup ("uint128"), field_type);
+ field_type = tdesc_named_type (feature, "v4f");
+ append_composite_type_field (type, xstrdup ("v4_float"), field_type);
+ field_type = tdesc_named_type (feature, "v4i32");
+ append_composite_type_field (type, xstrdup ("v4_int32"), field_type);
+ field_type = tdesc_named_type (feature, "v8i16");
+ append_composite_type_field (type, xstrdup ("v8_int16"), field_type);
+ field_type = tdesc_named_type (feature, "v16i8");
+ append_composite_type_field (type, xstrdup ("v16_int8"), field_type);
+ TYPE_FLAGS (type) |= TYPE_FLAG_VECTOR;
+ tdesc_record_type (feature, type);
+
+ tdesc_create_reg (feature, "vr0", 73, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr1", 74, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr2", 75, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr3", 76, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr4", 77, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr5", 78, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr6", 79, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr7", 80, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr8", 81, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr9", 82, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr10", 83, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr11", 84, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr12", 85, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr13", 86, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr14", 87, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr15", 88, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr16", 89, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr17", 90, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr18", 91, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr19", 92, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr20", 93, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr21", 94, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr22", 95, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr23", 96, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr24", 97, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr25", 98, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr26", 99, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr27", 100, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr28", 101, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr29", 102, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr30", 103, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vr31", 104, 1, NULL, 128, "vec128");
+ tdesc_create_reg (feature, "vscr", 105, 1, "vector", 32, "int");
+ tdesc_create_reg (feature, "vrsave", 106, 1, "vector", 32, "int");
+
+ feature = tdesc_create_feature (result, "org.gnu.gdb.power.vsx");
+ tdesc_create_reg (feature, "vs0h", 107, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs1h", 108, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs2h", 109, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs3h", 110, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs4h", 111, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs5h", 112, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs6h", 113, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs7h", 114, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs8h", 115, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs9h", 116, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs10h", 117, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs11h", 118, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs12h", 119, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs13h", 120, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs14h", 121, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs15h", 122, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs16h", 123, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs17h", 124, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs18h", 125, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs19h", 126, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs20h", 127, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs21h", 128, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs22h", 129, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs23h", 130, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs24h", 131, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs25h", 132, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs26h", 133, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs27h", 134, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs28h", 135, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs29h", 136, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs30h", 137, 1, NULL, 64, "uint64");
+ tdesc_create_reg (feature, "vs31h", 138, 1, NULL, 64, "uint64");
+
+ tdesc_powerpc_vsx64l = result;
+}
Index: gdb/features/rs6000/powerpc-vsx64l.xml
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/features/rs6000/powerpc-vsx64l.xml 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,20 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2008 Free Software Foundation, Inc.
+
+ Copying and distribution of this file, with or without modification,
+ are permitted in any medium without royalty provided the copyright
+ notice and this notice are preserved. -->
+
+<!-- PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
+ view of the PowerPC. Includes Linux-only special "registers" and AltiVec
+ vector registers. -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+ <architecture>powerpc:common64</architecture>
+ <xi:include href="power64-core.xml"/>
+ <xi:include href="power-fpu.xml"/>
+ <xi:include href="power64-linux.xml"/>
+ <xi:include href="power-altivec.xml"/>
+ <xi:include href="power-vsx.xml"/>
+</target>
Index: gdb/regformats/rs6000/powerpc-vsx32l.dat
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/regformats/rs6000/powerpc-vsx32l.dat 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,143 @@
+# DO NOT EDIT: generated from rs6000/powerpc-vsx32l.xml
+name:powerpc_vsx32l
+xmltarget:powerpc-vsx32l.xml
+expedite:r1,pc
+32:r0
+32:r1
+32:r2
+32:r3
+32:r4
+32:r5
+32:r6
+32:r7
+32:r8
+32:r9
+32:r10
+32:r11
+32:r12
+32:r13
+32:r14
+32:r15
+32:r16
+32:r17
+32:r18
+32:r19
+32:r20
+32:r21
+32:r22
+32:r23
+32:r24
+32:r25
+32:r26
+32:r27
+32:r28
+32:r29
+32:r30
+32:r31
+64:f0
+64:f1
+64:f2
+64:f3
+64:f4
+64:f5
+64:f6
+64:f7
+64:f8
+64:f9
+64:f10
+64:f11
+64:f12
+64:f13
+64:f14
+64:f15
+64:f16
+64:f17
+64:f18
+64:f19
+64:f20
+64:f21
+64:f22
+64:f23
+64:f24
+64:f25
+64:f26
+64:f27
+64:f28
+64:f29
+64:f30
+64:f31
+32:pc
+32:msr
+32:cr
+32:lr
+32:ctr
+32:xer
+32:fpscr
+32:orig_r3
+32:trap
+128:vr0
+128:vr1
+128:vr2
+128:vr3
+128:vr4
+128:vr5
+128:vr6
+128:vr7
+128:vr8
+128:vr9
+128:vr10
+128:vr11
+128:vr12
+128:vr13
+128:vr14
+128:vr15
+128:vr16
+128:vr17
+128:vr18
+128:vr19
+128:vr20
+128:vr21
+128:vr22
+128:vr23
+128:vr24
+128:vr25
+128:vr26
+128:vr27
+128:vr28
+128:vr29
+128:vr30
+128:vr31
+32:vscr
+32:vrsave
+64:vs0h
+64:vs1h
+64:vs2h
+64:vs3h
+64:vs4h
+64:vs5h
+64:vs6h
+64:vs7h
+64:vs8h
+64:vs9h
+64:vs10h
+64:vs11h
+64:vs12h
+64:vs13h
+64:vs14h
+64:vs15h
+64:vs16h
+64:vs17h
+64:vs18h
+64:vs19h
+64:vs20h
+64:vs21h
+64:vs22h
+64:vs23h
+64:vs24h
+64:vs25h
+64:vs26h
+64:vs27h
+64:vs28h
+64:vs29h
+64:vs30h
+64:vs31h
Index: gdb/regformats/rs6000/powerpc-vsx64l.dat
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gdb/regformats/rs6000/powerpc-vsx64l.dat 2008-07-25 08:24:19.000000000 -0700
@@ -0,0 +1,143 @@
+# DO NOT EDIT: generated from rs6000/powerpc-vsx64l.xml
+name:powerpc_vsx64l
+xmltarget:powerpc-vsx64l.xml
+expedite:r1,pc
+64:r0
+64:r1
+64:r2
+64:r3
+64:r4
+64:r5
+64:r6
+64:r7
+64:r8
+64:r9
+64:r10
+64:r11
+64:r12
+64:r13
+64:r14
+64:r15
+64:r16
+64:r17
+64:r18
+64:r19
+64:r20
+64:r21
+64:r22
+64:r23
+64:r24
+64:r25
+64:r26
+64:r27
+64:r28
+64:r29
+64:r30
+64:r31
+64:f0
+64:f1
+64:f2
+64:f3
+64:f4
+64:f5
+64:f6
+64:f7
+64:f8
+64:f9
+64:f10
+64:f11
+64:f12
+64:f13
+64:f14
+64:f15
+64:f16
+64:f17
+64:f18
+64:f19
+64:f20
+64:f21
+64:f22
+64:f23
+64:f24
+64:f25
+64:f26
+64:f27
+64:f28
+64:f29
+64:f30
+64:f31
+64:pc
+64:msr
+32:cr
+64:lr
+64:ctr
+32:xer
+32:fpscr
+64:orig_r3
+64:trap
+128:vr0
+128:vr1
+128:vr2
+128:vr3
+128:vr4
+128:vr5
+128:vr6
+128:vr7
+128:vr8
+128:vr9
+128:vr10
+128:vr11
+128:vr12
+128:vr13
+128:vr14
+128:vr15
+128:vr16
+128:vr17
+128:vr18
+128:vr19
+128:vr20
+128:vr21
+128:vr22
+128:vr23
+128:vr24
+128:vr25
+128:vr26
+128:vr27
+128:vr28
+128:vr29
+128:vr30
+128:vr31
+32:vscr
+32:vrsave
+64:vs0h
+64:vs1h
+64:vs2h
+64:vs3h
+64:vs4h
+64:vs5h
+64:vs6h
+64:vs7h
+64:vs8h
+64:vs9h
+64:vs10h
+64:vs11h
+64:vs12h
+64:vs13h
+64:vs14h
+64:vs15h
+64:vs16h
+64:vs17h
+64:vs18h
+64:vs19h
+64:vs20h
+64:vs21h
+64:vs22h
+64:vs23h
+64:vs24h
+64:vs25h
+64:vs26h
+64:vs27h
+64:vs28h
+64:vs29h
+64:vs30h
+64:vs31h
Index: gdb/Makefile.in
===================================================================
--- gdb.orig/Makefile.in 2008-07-25 07:31:44.000000000 -0700
+++ gdb/Makefile.in 2008-07-25 08:24:19.000000000 -0700
@@ -972,6 +972,8 @@
powerpc_32l_c = $(srcdir)/features/rs6000/powerpc-32l.c $(features_headers)
powerpc_altivec32_c = $(srcdir)/features/rs6000/powerpc-altivec32.c $(features_headers)
powerpc_altivec32l_c = $(srcdir)/features/rs6000/powerpc-altivec32l.c $(features_headers)
+powerpc_vsx32_c = $(srcdir)/features/rs6000/powerpc-vsx32.c $(features_headers)
+powerpc_vsx32l_c = $(srcdir)/features/rs6000/powerpc-vsx32l.c $(features_headers)
powerpc_403_c = $(srcdir)/features/rs6000/powerpc-403.c $(features_headers)
powerpc_403gc_c = $(srcdir)/features/rs6000/powerpc-403gc.c $(features_headers)
powerpc_505_c = $(srcdir)/features/rs6000/powerpc-505.c $(features_headers)
@@ -983,6 +985,8 @@
powerpc_64l_c = $(srcdir)/features/rs6000/powerpc-64l.c $(features_headers)
powerpc_altivec64_c = $(srcdir)/features/rs6000/powerpc-altivec64.c $(features_headers)
powerpc_altivec64l_c = $(srcdir)/features/rs6000/powerpc-altivec64l.c $(features_headers)
+powerpc_vsx64_c = $(srcdir)/features/rs6000/powerpc-vsx64.c $(features_headers)
+powerpc_vsx64l_c = $(srcdir)/features/rs6000/powerpc-vsx64l.c $(features_headers)
powerpc_7400_c = $(srcdir)/features/rs6000/powerpc-7400.c $(features_headers)
powerpc_750_c = $(srcdir)/features/rs6000/powerpc-750.c $(features_headers)
powerpc_860_c = $(srcdir)/features/rs6000/powerpc-860.c $(features_headers)
@@ -2601,8 +2605,9 @@
$(objfiles_h) $(regcache_h) $(value_h) $(osabi_h) $(regset_h) \
$(solib_svr4_h) $(ppc_tdep_h) $(ppc_linux_tdep_h) $(trad_frame_h) \
$(frame_unwind_h) $(tramp_frame_h) \
- $(powerpc_32l_c) $(powerpc_altivec32l_c) $(powerpc_e500l_c) \
- $(powerpc_64l_c) $(powerpc_altivec64l_c)
+ $(powerpc_32l_c) $(powerpc_altivec32l_c) $(powerpc_vsx32l_c) \
+ $(powerpc_e500l_c) $(powerpc_64l_c) $(powerpc_altivec64l_c) \
+ $(powerpc_vsx64l_c)
ppcnbsd-nat.o: ppcnbsd-nat.c $(defs_h) $(inferior_h) $(gdb_assert_h) \
$(gdbcore_h) $(regcache_h) $(bsd_kvm_h) $(ppc_tdep_h) \
$(ppcnbsd_tdep_h) $(inf_ptrace_h)
@@ -2687,11 +2692,12 @@
$(ppc_tdep_h) $(gdb_assert_h) $(dis_asm_h) $(trad_frame_h) \
$(frame_unwind_h) $(frame_base_h) $(dwarf2_frame_h) \
$(target_descriptions) $(user_regs_h) $(elf_ppc_h) \
- $(powerpc_32_c) $(powerpc_altivec32_c) $(powerpc_403_c) \
- $(powerpc_403gc_c) $(powerpc_505_c) $(powerpc_601_c) \
- $(powerpc_602_c) $(powerpc_603_c) $(powerpc_604_c) \
- $(powerpc_64_c) $(powerpc_altivec64_c) $(powerpc_7400_c) \
- $(powerpc_750_c) $(powerpc_860_c) $(powerpc_e500_c) $(rs6000_c)
+ $(powerpc_32_c) $(powerpc_altivec32_c) $(powerpc_vsx32_c) \
+ $(powerpc_403_c) $(powerpc_403gc_c) $(powerpc_505_c) \
+ $(powerpc_601_c) $(powerpc_602_c) $(powerpc_603_c) $(powerpc_604_c) \
+ $(powerpc_64_c) $(powerpc_altivec64_c) $(powerpc_vsx64_c) \
+ $(powerpc_7400_c) $(powerpc_750_c) $(powerpc_860_c) $(powerpc_e500_c) \
+ $(rs6000_c)
rs6000-aix-tdep.o: rs6000-aix-tdep.c $(defs_h) $(gdb_string_h) $(gdb_assert) \
$(osabi_h) $(regcache_h) $(regset_h) $(gdbtypes_h) $(gdbcore_h) \
$(target_h) $(value_h) $(infcall_h) $(objfiles_h) $(breakpoint_h) \