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[PATCH] sim: bfin: update AV and AC ASTAT bits with acc negation


From: Robin Getz <robin.getz@analog.com>

The Acc=-Acc insn can overflow or carry with edge values, so make sure
we update the ASTAT bits accordingly to match the hardware.  Also fix
a thinko where we always updated AC0 even when working with A1 regs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

2011-03-21  Robin Getz  <robin.getz@analog.com>

	* bfin-sim.c (decode_dsp32alu_0): Call saturate_s40_astat instead of
	saturate_s40, and use the v parameter to update the AV bit.  Set the
	AC bit only when the final result is 0.
---
 sim/bfin/bfin-sim.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c
index ad12d2d..c78fe1a 100644
--- a/sim/bfin/bfin-sim.c
+++ b/sim/bfin/bfin-sim.c
@@ -4431,24 +4431,26 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
   else if ((aop == 0 || aop == 1) && (HL == 0 || HL == 1) && aopcde == 14)
     {
       bs40 src_acc = get_extended_acc (cpu, aop);
+      int v = 0;
 
       TRACE_INSN (cpu, "A%i = - A%i;", HL, aop);
 
-      SET_AREG (HL, saturate_s40 (-src_acc));
+      SET_AREG (HL, saturate_s40_astat (-src_acc, &v));
 
       SET_ASTATREG (az, AWREG (HL) == 0 && AXREG (HL) == 0);
       SET_ASTATREG (an, AXREG (HL) >> 7);
-      SET_ASTATREG (ac0, src_acc == 0);
       if (HL == 0)
 	{
-	  SET_ASTATREG (av0, src_acc < 0);
-	  if (ASTATREG (av0))
+	  SET_ASTATREG (ac0, !src_acc);
+	  SET_ASTATREG (av0, v);
+	  if (v)
 	    SET_ASTATREG (av0s, 1);
 	}
       else
 	{
-	  SET_ASTATREG (av1, src_acc < 0);
-	  if (ASTATREG (av1))
+	  SET_ASTATREG (ac1, !src_acc);
+	  SET_ASTATREG (av1, v);
+	  if (v)
 	    SET_ASTATREG (av1s, 1);
 	}
     }
-- 
1.7.4.1


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