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[PATCH] sim: bfin: pass up result2/errcode with libgloss syscalls
- From: Mike Frysinger <vapier at gentoo dot org>
- To: gdb-patches at sourceware dot org
- Cc: toolchain-devel at blackfin dot uclinux dot org
- Date: Wed, 22 Jun 2011 00:20:39 -0400
- Subject: [PATCH] sim: bfin: pass up result2/errcode with libgloss syscalls
Now that the Blackfin libgloss code extracts the 2nd result and the
error code from the R1/R2 registers, have the sim fill them up.
Committed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-22 Mike Frysinger <vapier@gentoo.org>
* interp.c (bfin_syscall): Delete old comment. Set dreg 1 to
sc.result2 and dreg 2 to sc.errcode.
---
sim/bfin/interp.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c
index 9a88bee..d073940 100644
--- a/sim/bfin/interp.c
+++ b/sim/bfin/interp.c
@@ -617,8 +617,8 @@ bfin_syscall (SIM_CPU *cpu)
{
tbuf += sprintf (tbuf, "%lu (error = %i)", sc.result, sc.errcode);
SET_DREG (0, sc.result);
- /* Blackfin libgloss only expects R0 to be updated, not R1. */
- /*SET_DREG (1, sc.errcode);*/
+ SET_DREG (1, sc.result2);
+ SET_DREG (2, sc.errcode);
}
TRACE_SYSCALL (cpu, "%s", _tbuf);
--
1.7.5.3