[patch] Add support for VFP d16 layout for Cortex-M4

[Jonathan Larmour <jifl at eCosCentric dot com>]

As mentioned in my response to the GDB list mail
<http://sourceware.org/ml/gdb/2012-04/msg00149.html>, I have a patch to
allow easy automatic use of Cortex-M targets with a register layout with
16 double precision / 32 single precision regs. This is as used in the
increasingly popular Cortex-M4 core.

I have chosen to use the remote packet guessing approach again, rather
than inferring from the executable's ELF header, because not everyone will
actually want to use hardware FP just because they're using that core, so
what the stub actually supports is a better indicator of what is wanted.

There's a couple of trivial little fixes from earlier changes too (a
comment and missing entries in features/Makefile). FAOD I have
write-after-approval commit perms.

Jifl


2012-04-19  Jonathan Larmour  <jifl@eCosCentric.com>

	* arm-dep.h (VFP_REGISTER_SIZE): Define.
	* features/Makefile: Add arm-with-m* entries currently missing.
	* features/arm-with-m-vfp-d16.xml: New file. Describes
	Cortex-M with VFPv4-sp-d16 FPU register layout.
	* features/arm-with-m-vfp-d16.c: Generate from above.
	* arm-tdep.c: Include arm-with-m-vfp-d16.c.
	(arm-register_g_packet_guesses): Fix comment. Add vfp-d16 guess.
	(_initialise_arm_tdep): Initialize arm-with-m-vfp-d16 tdesc.


arm-tdep.c                      |   12 ++++++++
arm-tdep.h                      |    4 ++
features/Makefile               |    3 +-
features/arm-with-m-vfp-d16.c   |   54
++++++++++++++++++++++++++++++++++++++++
features/arm-with-m-vfp-d16.xml |   13 +++++++++
5 files changed, 84 insertions(+), 2 deletions(-)

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Attachment: vfpd16.patch
Description: Text document