Index: arm-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/arm-tdep.c,v retrieving revision 1.361 diff -u -5 -p -r1.361 arm-tdep.c --- arm-tdep.c 20 Apr 2012 23:39:57 -0000 1.361 +++ arm-tdep.c 26 Apr 2012 14:55:38 -0000 @@ -57,10 +57,11 @@ #include "record.h" #include "features/arm-with-m.c" #include "features/arm-with-m-fpa-layout.c" +#include "features/arm-with-m-vfp-d16.c" #include "features/arm-with-iwmmxt.c" #include "features/arm-with-vfpv2.c" #include "features/arm-with-vfpv3.c" #include "features/arm-with-neon.c" @@ -9696,10 +9697,18 @@ arm_register_g_packet_guesses (struct gd register_remote_g_packet_guess (gdbarch, /* r0-r12,sp,lr,pc; xpsr */ (16 * INT_REGISTER_SIZE) + INT_REGISTER_SIZE, tdesc_arm_with_m); + + /* M-profile plus M4F VFP. */ + register_remote_g_packet_guess (gdbarch, + /* r0-r12,sp,lr,pc; d0-d15; fpscr,xpsr */ + (16 * INT_REGISTER_SIZE) + + (16 * VFP_REGISTER_SIZE) + + (2 * INT_REGISTER_SIZE), + tdesc_arm_with_m_vfp_d16); } /* Otherwise we don't have a useful guess. */ } @@ -10331,10 +10340,11 @@ _initialize_arm_tdep (void) arm_elf_osabi_sniffer); /* Initialize the standard target descriptions. */ initialize_tdesc_arm_with_m (); initialize_tdesc_arm_with_m_fpa_layout (); + initialize_tdesc_arm_with_m_vfp_d16 (); initialize_tdesc_arm_with_iwmmxt (); initialize_tdesc_arm_with_vfpv2 (); initialize_tdesc_arm_with_vfpv3 (); initialize_tdesc_arm_with_neon (); Index: arm-tdep.h =================================================================== RCS file: /cvs/src/src/gdb/arm-tdep.h,v retrieving revision 1.56 diff -u -5 -p -r1.56 arm-tdep.h --- arm-tdep.h 27 Mar 2012 15:46:33 -0000 1.56 +++ arm-tdep.h 26 Apr 2012 14:55:38 -0000 @@ -69,10 +69,14 @@ enum gdb_regnum { /* Say how long FP registers are. Used for documentation purposes and code readability in this header. IEEE extended doubles are 80 bits. DWORD aligned they use 96 bits. */ #define FP_REGISTER_SIZE 12 +/* Say how long VFP double precision registers are. Used for documentation + purposes and code readability. These are fixed at 64 bits. */ +#define VFP_REGISTER_SIZE 8 + /* Number of machine registers. The only define actually required is gdbarch_num_regs. The other definitions are used for documentation purposes and code readability. */ /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS) (and called PS for processor status) so the status bits can be cleared Index: features/Makefile =================================================================== RCS file: /cvs/src/src/gdb/features/Makefile,v retrieving revision 1.27 diff -u -5 -p -r1.27 Makefile --- features/Makefile 20 Apr 2012 23:39:58 -0000 1.27 +++ features/Makefile 26 Apr 2012 14:55:38 -0000 @@ -29,11 +29,11 @@ # configured for the correct architecture, so the files are again kept # in the GDB repository. To generate C files: # make GDB=/path/to/gdb XMLTOC="xml files" cfiles WHICH = arm-with-iwmmxt arm-with-vfpv2 arm-with-vfpv3 arm-with-neon \ - arm-with-m arm-with-m-fpa-layout \ + arm-with-m arm-with-m-fpa-layout arm-with-m-vfp-d16 \ i386/i386 i386/i386-linux \ i386/i386-mmx i386/i386-mmx-linux \ i386/amd64 i386/amd64-linux \ i386/i386-avx i386/i386-avx-linux \ i386/amd64-avx i386/amd64-avx-linux \ Index: features/arm-with-m-vfp-d16.c =================================================================== RCS file: features/arm-with-m-vfp-d16.c diff -N features/arm-with-m-vfp-d16.c --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ features/arm-with-m-vfp-d16.c 26 Apr 2012 14:55:38 -0000 @@ -0,0 +1,53 @@ +/* THIS FILE IS GENERATED. Original: arm-with-m-vfp-d16.xml */ + +#include "defs.h" +#include "osabi.h" +#include "target-descriptions.h" + +struct target_desc *tdesc_arm_with_m_vfp_d16; +static void +initialize_tdesc_arm_with_m_vfp_d16 (void) +{ + struct target_desc *result = allocate_target_description (); + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.m-profile"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "sp", 13, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "lr", 14, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "pc", 15, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "xpsr", 25, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result, "org.gnu.gdb.arm.vfp"); + tdesc_create_reg (feature, "d0", 26, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d1", 27, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d2", 28, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d3", 29, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d4", 30, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d5", 31, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d6", 32, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d7", 33, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d8", 34, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d9", 35, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d10", 36, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d11", 37, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d12", 38, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d13", 39, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d14", 40, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "d15", 41, 1, NULL, 64, "ieee_double"); + tdesc_create_reg (feature, "fpscr", 42, 1, "float", 32, "int"); + + tdesc_arm_with_m_vfp_d16 = result; +} Index: features/arm-with-m-vfp-d16.xml =================================================================== RCS file: features/arm-with-m-vfp-d16.xml diff -N features/arm-with-m-vfp-d16.xml --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ features/arm-with-m-vfp-d16.xml 26 Apr 2012 14:55:38 -0000 @@ -0,0 +1,13 @@ + + + + + + + + +