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[RL78] Fix encoding of divwu insn
- From: Kaushik Phatak <Kaushik dot Phatak at kpitcummins dot com>
- To: "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>, "binutils at sourceware dot org" <binutils at sourceware dot org>
- Cc: Cecilia Rodrigues <Cecilia dot Rodrigues at kpitcummins dot com>
- Date: Thu, 21 Feb 2013 18:09:18 +0000
- Subject: [RL78] Fix encoding of divwu insn
Hi,
Please find below a small patch that fixes the opcode generated for the "divwu"
instruction for the RL78 target. This would be as per the opcode table provided
by Renesas (Table 5.6 of RL78 Software Manual Rev.1.00 Jan 2011)
Posting this to binutils and gdb-patches.
Regards,
Kaushik Phatak
gas/Changelog
* rl78-parse.y: Fix encoding of divwu insn.
opcodes/Changelog
* rl78-decode.c: Fix encoding of divwu insn.
* rl78-decode.opc: Ditto.
diff -uprN ./orig/gas/config/rl78-parse.y ./new/gas/config/rl78-parse.y
--- ./orig/gas/config/rl78-parse.y 2013-01-11 12:51:38.000000000 +0530
+++ ./new/gas/config/rl78-parse.y 2013-02-15 22:24:45.000000000 +0530
@@ -514,7 +514,7 @@ statement :
{ B3 (0xce, 0xfb, 0x03); }
| DIVWU
- { B3 (0xce, 0xfb, 0x04); }
+ { B3 (0xce, 0xfb, 0x0b); }
| MACHU
{ B3 (0xce, 0xfb, 0x05); }
diff -uprN ./orig/opcodes/rl78-decode.c ./new/opcoodes/rl78-decode.c
--- ./orig/opcodes/rl78-decode.c 2013-01-11 12:51:40.000000000 +0530
+++ ./new/opcodes/rl78-decode.c 2013-02-15 22:16:18.000000000 +0530
@@ -5145,7 +5145,7 @@ rl78_decode_opcode (unsigned long pc AU,
case 0x03:
rl78->syntax = "divhu"; ID(divhu);
break;
- case 0x04:
+ case 0x0b:
rl78->syntax = "divwu"; ID(divwu);
break;
case 0x05:
diff -uprN ./orig/opcodes/rl78-decode.opc ./new/opcodes/rl78-decode.opc
--- ./orig/opcodes/rl78-decode.opc 2013-01-11 12:51:40.000000000 +0530
+++ ./new/opcodes/rl78-decode.opc 2013-02-15 22:15:45.000000000 +0530
@@ -740,7 +740,7 @@ rl78_decode_opcode (unsigned long pc AU,
case 0x03:
rl78->syntax = "divhu"; ID(divhu);
break;
- case 0x04:
+ case 0x0b:
rl78->syntax = "divwu"; ID(divwu);
break;
case 0x05: