This is the mail archive of the gdb-patches@sourceware.org mailing list for the GDB project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [RFA/commit] arm-tdep.c: Do not single-step after hitting a watchpoint


> I assume that WFAR/DSCR are privileged registers though.
> On Linux, for example, they're not exported to userspace.

Indeed, I was expecting as much...

> > Informing the user about how
> > far would certainly be a useful info for the user. The only
> > part I'm unclear about is whether it's OK to check WFAR when
> > in synchronous mode, and whether it'll have a WFAR=0 in case
> > of a synchronous breakpoint...
> 
> I think it'd be better leave those details to the
> remote stub / OS though.  E.g., this way, qemu's gdbserver
> stub may support watchpoint variants that the hardware
> qemu is emulating doesn't support.

Sure! That's what I meant, and was thinking of our gdbserver
implementation. But now that I think this through, of course
GDBserver is mostly implemented... on top of an OS! Duh...

> For instance, as a natural extension of this, we could
> make it possible for qemu to have non-continuable watchpoints
> (trap before the instruction that changes memory executes) on all
> targets, even x86.  Or have it trap after the instruction
> that changes memory, but tell GDB the address of the instruction
> that triggered the watchpoint (there's no magic number to subtract
> on x86, due to variable-length instructions).

That's very interesting. When I talked to one of our QEMU developers
in house about this, he wasn't even sure if it was possible for
QEMU to stop at the instruction triggering the watchpoint. Now,
we know it is, but it could be simpler for QEMU to implement the
same policy on all targets.

-- 
Joel


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]