[committed] MIPS: Correct MUSTBE32 interpretation in delay slot handling

["Maciej W. Rozycki" <macro at codesourcery dot com>]

Hi,

 In testing an upcoming change I've noticed 
`micromips_instruction_has_delay_slot' and 
`mips16_instruction_has_delay_slot' both incorrectly interpret their 
MUSTBE32 argument.  Their callers assume that when the flag is clear these 
functions will return 1 when any non-compact jump or branch instruction is 
present at ADDR, while in fact they will only return 1 for 16-bit such 
instructions only.  This change makes the implementations match the 
expectations.

 Regression-tested with the mips-linux-gnu target and the following 
multilibs:

-EB
-EB -msoft-float
-EB -mips16
-EB -mips16 -msoft-float
-EB -mmicromips
-EB -mmicromips -msoft-float
-EB -mabi=n32
-EB -mabi=n32 -msoft-float
-EB -mabi=64
-EB -mabi=64 -msoft-float

and the -EL variants of same.  Committed.

2014-10-05  Maciej W. Rozycki  <macro@codesourcery.com>

	gdb/
	* mips-tdep.c (micromips_instruction_has_delay_slot): When 
	!mustbe32 also return 1 for 32-bit instructions.
	(mips16_instruction_has_delay_slot): Likewise.  Add an 
	explanatory comment.

  Maciej

gdb-mips-mustbe32-fix.diff
Index: gdb-fsf-trunk-quilt/gdb/mips-tdep.c
===================================================================
--- gdb-fsf-trunk-quilt.orig/gdb/mips-tdep.c	2014-10-05 00:01:12.000000000 +0100
+++ gdb-fsf-trunk-quilt/gdb/mips-tdep.c	2014-10-05 20:53:34.258970432 +0100
@@ -7051,17 +7051,18 @@ micromips_instruction_has_delay_slot (st
   if (status)
     return 0;
 
-  if (!mustbe32)		/* 16-bit instructions.  */
-    return (micromips_op (insn) == 0x11
+				/* 16-bit instructions.  */
+  if ((micromips_op (insn) == 0x11
 				/* POOL16C: bits 010001 */
-	    && (b5s5_op (insn) == 0xc
+       && (b5s5_op (insn) == 0xc
 				/* JR16: bits 010001 01100 */
-		|| (b5s5_op (insn) & 0x1e) == 0xe))
+	   || (b5s5_op (insn) & 0x1e) == 0xe))
 				/* JALR16, JALRS16: bits 010001 0111x */
-	   || (micromips_op (insn) & 0x37) == 0x23
+      || (micromips_op (insn) & 0x37) == 0x23
 				/* BEQZ16, BNEZ16: bits 10x011 */
-	   || micromips_op (insn) == 0x33;
+      || micromips_op (insn) == 0x33)
 				/* B16: bits 110011 */
+    return !mustbe32;
 
 				/* 32-bit instructions.  */
   if (micromips_op (insn) == 0x0)
@@ -7107,6 +7108,10 @@ micromips_instruction_has_delay_slot (st
 				/* JALX: bits 111100 */
 }
 
+/* Return non-zero if a MIPS16 instruction at ADDR has a branch delay
+   slot (i.e. it is a non-compact jump instruction).  The instruction
+   must be 32-bit if MUSTBE32 is set or can be any instruction otherwise.  */
+
 static int
 mips16_instruction_has_delay_slot (struct gdbarch *gdbarch, CORE_ADDR addr,
 				   int mustbe32)
@@ -7118,8 +7123,8 @@ mips16_instruction_has_delay_slot (struc
   if (status)
     return 0;
 
-  if (!mustbe32)
-    return (inst & 0xf89f) == 0xe800;	/* JR/JALR (16-bit instruction)  */
+  if ((inst & 0xf89f) == 0xe800)	/* JR/JALR (16-bit instruction)  */
+    return !mustbe32;
   return (inst & 0xf800) == 0x1800;	/* JAL/JALX (32-bit instruction)  */
 }