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Re: [PATCH] [gdbserver] Disable conditional breakpoints on no-hardware-single-step targets


On 04/30/2015 05:23 PM, Yao Qi wrote:
> From: Yao Qi <yao.qi@linaro.org>
> 
> GDBserver steps over breakpoint if the condition is false, but if target
> doesn't support hardware single step, the step over is very simple, if
> not incorrect, in linux-arm-low.c:
> 
> /* We only place breakpoints in empty marker functions, and thread locking
>    is outside of the function.  So rather than importing software single-step,
>    we can just run until exit.  */
> static CORE_ADDR
> arm_reinsert_addr (void)
> {
>   struct regcache *regcache = get_thread_regcache (current_thread, 1);
>   unsigned long pc;
>   collect_register_by_name (regcache, "lr", &pc);
>   return pc;
> }
> 
> and linux-mips-low.c does the same.  GDBserver sets a breakpoint at the
> return address of the current function, resume and wait the program hits
> the breakpoint in order to achieve "breakpoint step over".  What if
> program hits other user breakponits during this "step over"?
> 
> It is worse if the arm/thumb interworking is considered.  Nowadays,
> GDBserver arm backend unconditionally inserts arm breakpoint,
> 
>   /* Define an ARM-mode breakpoint; we only set breakpoints in the C
>      library, which is most likely to be ARM.  If the kernel supports
>      clone events, we will never insert a breakpoint, so even a Thumb
>      C library will work; so will mixing EABI/non-EABI gdbserver and
>      application.  */
> #ifndef __ARM_EABI__
>   (const unsigned char *) &arm_breakpoint,
> #else
>   (const unsigned char *) &arm_eabi_breakpoint,
> #endif
> 
> note that the comments are no longer valid as C library can be compiled
> in thumb mode.
> 
> When GDBserver steps over a breakpoint in arm mode function, which
> returns to thumb mode, GDBserver will insert arm mode breakpoint by
> mistake and the program will crash.  GDBserver alone is unable to
> determine the arm/thumb mode given a PC address.  See how GDB does
> it in arm-tdep.c:arm_pc_is_thumb.

Of a random PC address no, but in gdbserver's case, I think that it
would work, because we need it to step over a breakpoint that is
at the current PC.  So we could:

 #1 - Get the mode of the current PC from the thread's $cpsr register.

 #2 - Get the mode of the next PC by looking at the instruction that is
      about to be executed (at current PC).  If bx and blx, which change
      modes, check the thumb bit of the destination address.
      For all other instructions, same mode as the current PC.

> 
> After thinking about how to teach GDBserver inserting right breakpoint
> (arm or thumb) for a while, I reconsider it from a different direction
> that it may be unreasonable to run target-side conditional breakpoint for
> targets without hardware single step.  Pedro also pointed this out here
> https://sourceware.org/ml/gdb-patches/2015-04/msg00337.html

In the end I was somewhat convinced that things ended up working.
But I certainly don't object to this patch.

> +  /* Although win32-i386 has hardware single step, still disable this
> +     feature for win32, because it is quite GNU/Linux specific.  */
> +  NULL, /* supports_conditional_breakpoints */

TBC, it's not that the feature is GNU/Linux specific (like something
related to system calls or some detail in glibc), but that the support
for conditional breakpoints is baked into linux-low.c instead of
in generic code.

>    win32_stopped_by_watchpoint,
>    win32_stopped_data_address,
>    NULL, /* read_offsets */


Thanks,
Pedro Alves


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