Re: [patch] [v2] Enable dwarf unwind for AVR target

[Pitchumani Sivanupandi <pitchumani dot s at atmel dot com>]

On Wed, Feb 03, 2016 at 09:45:34AM -0700, Kevin Buettner wrote:
> On Fri, 8 Jan 2016 08:52:33 +0000
> "Sivanupandi, Pitchumani" <Pitchumani.Sivanupandi@atmel.com> wrote:
> 
> > Dwarf debug info generated by avr-gcc denotes the return address by register
> > 36 which is not an actual register.
> > e.g. .debug_frame
> > (--snip--)
> > 00000000 00000010 ffffffff CIE
> >   Version:               1
> >   Augmentation:          ""
> >   Code alignment factor: 2
> >   Data alignment factor: -1
> >   Return address column: 36
> > 
> >   DW_CFA_def_cfa: r32 ofs 3
> >   DW_CFA_offset: r36 at cfa-2
> > (--snip--)
> > 
> > The fix is to add a pseudo register (36 - AVR_DWARF2_PC_REGNUM/LR) to gdb to
> > map return address register. Register name is "LR" (link register). When dwarf
> > frame unwind asks for PC, target function will read return address value from
> > AVR_DWARF2_PC_REGNUM's CFA address.
> 
> The usual way to handle this problem is to define a dwarf2_reg_to_regnum
> method which maps the index of DWARF's return address column to GDB's PC 
> register.  So, for the AVR, you'd map 36 to 35.
> 
> If you do this, I think you can dispense with all of the stuff
> which adds and manipulates the pseudo-register.
> 
> Here's an example (from rx-tdep.c) where this is done:
> 
> static int
> rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
> {
>   if (0 <= reg && reg <= 15)
>     return reg;
>   else if (reg == 16)
>     return RX_PSW_REGNUM;
>   else if (reg == 17)
>     return RX_PC_REGNUM;
>   else
>     return -1;
> }
> 
> Then, in rx_gdbarch_init, this function is registered as follows:
> 
>   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum);
> 
> Hope this helps...

Sorry for delayed response.

Thanks for the comments. It is working, however I found few regressions
when running the gdb tests. I'll check those and post the updated patch.

Regards,
Pitchumani