Re: [PATCH 0/2] Split tdesc_(amd64|i386)_mpx into tdesc(amd64|i386)_mpx_* and tdesc(amd64|i386)_avx_mpx_*

[Marcin KoÅcielnicki <koriakin at 0x04 dot net>]

On 22/02/16 09:49, Walfred Tedeschi wrote:
> CPU features can occur in any combination. The current assumption that
> feature "A" implies in feature "B" does not necessarily hold.
>
> This patch series construct an additional combination of the Intel(R)
> Memory Protection Extensions (MPX) with Intel(R) Advanced Vector
> Extensions (AVX).
>
> Starting from the current implementation that has MPX combined with AVX.
> A new target description having only MPX will be created using a two
> step approach as described below:
>
> First step:
> Mirror (i386|amd64)mpx target descriptors onto (i386|amd64)-avx-mpx
> ones.
>
> Add a redundant target description for the MPX and AVX case using a
> combined feature name to reflect that, i.e. avx-mpx.  A new flag 2is
> also added to address MPX case without AVX.
>
>
> Second step:
> Refactor (i386|amd64)-mpx target descriptors.
>
> AVX feature is removed from the set of files that described MPX alone
> feature.  Present on GDB code previous to this patch.
>
>
> Tests were done with hardware having MPX and AVX as is.
> For MPX standing alone tests were done forcing the XCR0 bits.

FYI, I've just refactored a few things in x86 tdescs, to properly pass 
them into the IPA - you will have a conflict with my commit 
ae91f6253926e4dadebcae90772f4f5a5bd06056.  You will have to add an 
X86_TDESC_AVX_MPX enum value, emit it in gdbserver when you're using one 
of the new tdescs, and recognize it in the IPAs.  Sorry for the 
inconvenience.