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Re: [PATCH v2] AndesTech NDS32 port
- From: Yao Qi <qiyaoltc at gmail dot com>
- To: Yan-Ting Lin <currygt52 at gmail dot com>
- Cc: gdb-patches at sourceware dot org
- Date: Wed, 01 Jun 2016 12:28:16 +0100
- Subject: Re: [PATCH v2] AndesTech NDS32 port
- Authentication-results: sourceware.org; auth=none
- References: <3561f390-ea41-2ee3-a5a9-d870429497c3 at gmail dot com> <e65af384-a6e2-961d-e270-4decfcdab7c7 at redhat dot com> <ca473d29-ceb4-ba5e-1337-d479a5f16d8b at gmail dot com>
Yan-Ting Lin <currygt52@gmail.com> writes:
> +enum nds32_regnum
> +{
> + /* General purpose registers. */
> + NDS32_R0_REGNUM = 0,
> + NDS32_R5_REGNUM = 5,
> + NDS32_TA_REGNUM = 15, /* Temporary register. */
> + NDS32_FP_REGNUM = 28, /* Frame pointer. */
> + NDS32_GP_REGNUM = 29, /* Global pointer. */
> + NDS32_LP_REGNUM = 30, /* Link pointer. */
> + NDS32_SP_REGNUM = 31, /* Stack pointer. */
> +
> + NDS32_PC_REGNUM = 32, /* Program counter. */
> +
> + NDS32_NUM_REGS,
> +
> + /* Double precision floating-point registers. */
> + NDS32_FD0_REGNUM = NDS32_NUM_REGS,
> +};
> +
> +struct gdbarch_tdep
> +{
> + /* The guessed FPU configuration. */
> + int fpu_freg;
> + /* FSRs are defined as pseudo registers. */
> + int use_pseudo_fsrs;
> + /* Cached regnum of the first FSR (FS0). */
> + int fs0_regnum;
> + /* Cached regnum of the first FDR (FD0). */
> + int fd0_regnum;
> + /* ABI info. */
> + int abi;
> +};
We can either use NDS32_FD0_REGNUM or gdbarch_tdep.fd0_regnum, IMO. If
the register number of fd0 is fixed, we can use NDS32_FD0_REGNUM,
otherwise, we need to use gdbarch_tdep.fd0_regnum. If so, we can remove
one of them.
--
Yao (éå)