Re: [PATCH/committed] sim: mips: fix builds for r3900 cpus due to missing check_u64

["Maciej W. Rozycki" <macro at imgtec dot com>]

On Fri, 11 Nov 2016, Mike Frysinger wrote:

> diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
> index 53370bf3dcf6..522cad6fe450 100644
> --- a/sim/mips/mips.igen
> +++ b/sim/mips/mips.igen
> @@ -496,6 +496,7 @@
>  *vr5000:
>  *vr5400:
>  *vr5500:
> +*r3900:
>  {
>    // The check should be similar to mips64 for any with PX/UX bit equivalents.
>  }

 This looks wrong to me -- as far as the instruction set is concerned the 
TX39 family members are all 32-bit MIPS I processors with some extensions 
(branch likelies, MADD/U, CACHE, SYNC, DERET and SDBBP, except the latter 
all compatibly encoded) and load interlocking (no load delay slots) [1] -- 
so mostly like `mipsI' -- and therefore `check_u64' shouldn't be called in 
the first place.

 If the simulator fails to build, then the bug must be elsewhere, e.g. why 
are DMFC1 and DMTC1 marked for `r3900' given that there are no 64-bit GPRs 
that could be used by these instructions -- a misapplied patch hunk in a 
distant past perhaps?

 It looks to me like this change needs be reverted and the `r3900' marking 
removed from DMFC1/DMTC1 encodings and their dependencies instead.

References:

[1] "32-Bit TX System RISC TX39 Family Architecture", Toshiba Corporation,
    Appendix A "Instruction Set Details"

 HTH,

  Maciej