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[PATCH 04/23] Fix spelling mistakes in comments in C source files (rest of modules)
- From: Ambrogino Modigliani <ambrogino dot modigliani at gmail dot com>
- To: gdb-patches at sourceware dot org, pedro_alves at portugalmail dot pt, ambrogino dot modigliani at gmail dot com, ambrogino dot modigliani at mail dot com
- Date: Sun, 20 Nov 2016 18:37:59 +0100
- Subject: [PATCH 04/23] Fix spelling mistakes in comments in C source files (rest of modules)
- Authentication-results: sourceware.org; auth=none
- References: <1479663498-30295-1-git-send-email-ambrogino.modigliani@mail.com>
binutils/ChangeLog:
* binutils/dwarf.c: Fix spelling in comments.
* binutils/dwarf.h: Fix spelling in comments.
* binutils/objcopy.c: Fix spelling in comments.
* binutils/od-macho.c: Fix spelling in comments.
* binutils/rclex.c: Fix spelling in comments.
* binutils/readelf.c: Fix spelling in comments.
* binutils/stabs.c: Fix spelling in comments.
gas/ChangeLog:
* gas/as.h: Fix spelling in comments.
* gas/config/obj-ecoff.c: Fix spelling in comments.
* gas/config/obj-macho.c: Fix spelling in comments.
* gas/config/tc-aarch64.c: Fix spelling in comments.
* gas/config/tc-arc.c: Fix spelling in comments.
* gas/config/tc-arm.c: Fix spelling in comments.
* gas/config/tc-avr.c: Fix spelling in comments.
* gas/config/tc-cr16.c: Fix spelling in comments.
* gas/config/tc-epiphany.c: Fix spelling in comments.
* gas/config/tc-frv.c: Fix spelling in comments.
* gas/config/tc-hppa.c: Fix spelling in comments.
* gas/config/tc-hppa.h: Fix spelling in comments.
* gas/config/tc-i370.c: Fix spelling in comments.
* gas/config/tc-m68hc11.c: Fix spelling in comments.
* gas/config/tc-m68k.c: Fix spelling in comments.
* gas/config/tc-mcore.c: Fix spelling in comments.
* gas/config/tc-mep.c: Fix spelling in comments.
* gas/config/tc-metag.c: Fix spelling in comments.
* gas/config/tc-mips.c: Fix spelling in comments.
* gas/config/tc-mn10200.c: Fix spelling in comments.
* gas/config/tc-mn10300.c: Fix spelling in comments.
* gas/config/tc-nds32.c: Fix spelling in comments.
* gas/config/tc-nios2.c: Fix spelling in comments.
* gas/config/tc-ns32k.c: Fix spelling in comments.
* gas/config/tc-pdp11.c: Fix spelling in comments.
* gas/config/tc-ppc.c: Fix spelling in comments.
* gas/config/tc-riscv.c: Fix spelling in comments.
* gas/config/tc-rx.c: Fix spelling in comments.
* gas/config/tc-score.c: Fix spelling in comments.
* gas/config/tc-score7.c: Fix spelling in comments.
* gas/config/tc-sparc.c: Fix spelling in comments.
* gas/config/tc-tic54x.c: Fix spelling in comments.
* gas/config/tc-vax.c: Fix spelling in comments.
* gas/config/tc-xgate.h: Fix spelling in comments.
* gas/config/tc-xtensa.c: Fix spelling in comments.
* gas/config/tc-z80.c: Fix spelling in comments.
* gas/dwarf2dbg.c: Fix spelling in comments.
* gas/input-file.h: Fix spelling in comments.
* gas/itbl-ops.c: Fix spelling in comments.
* gas/read.c: Fix spelling in comments.
* gas/stabs.c: Fix spelling in comments.
* gas/symbols.c: Fix spelling in comments.
* gas/testsuite/gas/all/itbl-test.c: Fix spelling in comments.
* gas/testsuite/gas/tic4x/opclasses.h: Fix spelling in comments.
* gas/write.c: Fix spelling in comments.
gold/ChangeLog:
* gold/aarch64.cc: Fix spelling in comments.
* gold/arm.cc: Fix spelling in comments.
* gold/icf.cc: Fix spelling in comments.
* gold/layout.cc: Fix spelling in comments.
* gold/layout.h: Fix spelling in comments.
* gold/mips.cc: Fix spelling in comments.
* gold/output.h: Fix spelling in comments.
* gold/plugin.h: Fix spelling in comments.
* gold/script-sections.h: Fix spelling in comments.
* gold/script.h: Fix spelling in comments.
* gold/stringpool.h: Fix spelling in comments.
* gold/tilegx.cc: Fix spelling in comments.
gprof/ChangeLog:
* gprof/basic_blocks.c: Fix spelling in comments.
* gprof/cg_arcs.c: Fix spelling in comments.
* gprof/cg_print.c: Fix spelling in comments.
* gprof/corefile.c: Fix spelling in comments.
include/ChangeLog:
* include/ansidecl.h: Fix spelling in comments.
* include/aout/aout64.h: Fix spelling in comments.
* include/aout/encap.h: Fix spelling in comments.
* include/aout/ranlib.h: Fix spelling in comments.
* include/coff/internal.h: Fix spelling in comments.
* include/coff/sym.h: Fix spelling in comments.
* include/coff/xcoff.h: Fix spelling in comments.
* include/elf/common.h: Fix spelling in comments.
* include/elf/ia64.h: Fix spelling in comments.
* include/elf/metag.h: Fix spelling in comments.
* include/elf/nds32.h: Fix spelling in comments.
* include/gdb/callback.h: Fix spelling in comments.
* include/gdb/remote-sim.h: Fix spelling in comments.
* include/mach-o/arm.h: Fix spelling in comments.
* include/opcode/alpha.h: Fix spelling in comments.
* include/opcode/arc.h: Fix spelling in comments.
* include/opcode/hppa.h: Fix spelling in comments.
* include/opcode/ppc.h: Fix spelling in comments.
* include/opcode/tic4x.h: Fix spelling in comments.
* include/opcode/tic6x-insn-formats.h: Fix spelling in comments.
* include/opcode/tic80.h: Fix spelling in comments.
* include/safe-ctype.h: Fix spelling in comments.
* include/splay-tree.h: Fix spelling in comments.
intl/ChangeLog:
* intl/dcigettext.c: Fix spelling in comments.
* intl/plural.c: Fix spelling in comments.
ld/ChangeLog:
* ld/deffile.h: Fix spelling in comments.
* ld/ld.h: Fix spelling in comments.
* ld/ldlang.c: Fix spelling in comments.
* ld/ldmisc.c: Fix spelling in comments.
* ld/pe-dll.c: Fix spelling in comments.
libdecnumber/ChangeLog:
* libdecnumber/decBasic.c: Fix spelling in comments.
libiberty/ChangeLog:
* libiberty/bcopy.c: Fix spelling in comments.
* libiberty/cp-demangle.c: Fix spelling in comments.
* libiberty/cplus-dem.c: Fix spelling in comments.
* libiberty/make-relative-prefix.c: Fix spelling in comments.
* libiberty/pex-win32.c: Fix spelling in comments.
* libiberty/random.c: Fix spelling in comments.
* libiberty/regex.c: Fix spelling in comments.
* libiberty/simple-object-mach-o.c: Fix spelling in comments.
* libiberty/strsignal.c: Fix spelling in comments.
opcodes/ChangeLog:
* opcodes/aarch64-asm.c: Fix spelling in comments.
* opcodes/aarch64-dis.c: Fix spelling in comments.
* opcodes/arc-dis.c: Fix spelling in comments.
* opcodes/arm-dis.c: Fix spelling in comments.
* opcodes/cgen-asm.c: Fix spelling in comments.
* opcodes/cgen-dis.c: Fix spelling in comments.
* opcodes/cgen-opc.c: Fix spelling in comments.
* opcodes/dis-buf.c: Fix spelling in comments.
* opcodes/epiphany-asm.c: Fix spelling in comments.
* opcodes/epiphany-dis.c: Fix spelling in comments.
* opcodes/fr30-asm.c: Fix spelling in comments.
* opcodes/fr30-dis.c: Fix spelling in comments.
* opcodes/frv-asm.c: Fix spelling in comments.
* opcodes/frv-dis.c: Fix spelling in comments.
* opcodes/frv-opc.c: Fix spelling in comments.
* opcodes/hppa-dis.c: Fix spelling in comments.
* opcodes/i386-dis.c: Fix spelling in comments.
* opcodes/i386-opc.h: Fix spelling in comments.
* opcodes/ip2k-asm.c: Fix spelling in comments.
* opcodes/ip2k-dis.c: Fix spelling in comments.
* opcodes/iq2000-asm.c: Fix spelling in comments.
* opcodes/iq2000-dis.c: Fix spelling in comments.
* opcodes/lm32-asm.c: Fix spelling in comments.
* opcodes/lm32-dis.c: Fix spelling in comments.
* opcodes/m32c-asm.c: Fix spelling in comments.
* opcodes/m32c-dis.c: Fix spelling in comments.
* opcodes/m32r-asm.c: Fix spelling in comments.
* opcodes/m32r-dis.c: Fix spelling in comments.
* opcodes/m68hc11-opc.c: Fix spelling in comments.
* opcodes/m68k-dis.c: Fix spelling in comments.
* opcodes/m68k-opc.c: Fix spelling in comments.
* opcodes/mep-asm.c: Fix spelling in comments.
* opcodes/mep-dis.c: Fix spelling in comments.
* opcodes/metag-dis.c: Fix spelling in comments.
* opcodes/msp430-decode.c: Fix spelling in comments.
* opcodes/msp430-dis.c: Fix spelling in comments.
* opcodes/mt-asm.c: Fix spelling in comments.
* opcodes/mt-dis.c: Fix spelling in comments.
* opcodes/ns32k-dis.c: Fix spelling in comments.
* opcodes/opintl.h: Fix spelling in comments.
* opcodes/or1k-asm.c: Fix spelling in comments.
* opcodes/or1k-desc.h: Fix spelling in comments.
* opcodes/or1k-dis.c: Fix spelling in comments.
* opcodes/ppc-opc.c: Fix spelling in comments.
* opcodes/sh-dis.c: Fix spelling in comments.
* opcodes/sh64-dis.c: Fix spelling in comments.
* opcodes/tic30-dis.c: Fix spelling in comments.
* opcodes/v850-opc.c: Fix spelling in comments.
* opcodes/xc16x-asm.c: Fix spelling in comments.
* opcodes/xc16x-dis.c: Fix spelling in comments.
* opcodes/xstormy16-asm.c: Fix spelling in comments.
* opcodes/xstormy16-dis.c: Fix spelling in comments.
* opcodes/xtensa-dis.c: Fix spelling in comments.
readline/ChangeLog:
* readline/display.c: Fix spelling in comments.
* readline/examples/rlfe/rlfe.c: Fix spelling in comments.
* readline/examples/rlptytest.c: Fix spelling in comments.
* readline/histexpand.c: Fix spelling in comments.
* readline/history.h: Fix spelling in comments.
* readline/input.c: Fix spelling in comments.
* readline/readline.c: Fix spelling in comments.
* readline/rlprivate.h: Fix spelling in comments.
* readline/text.c: Fix spelling in comments.
zlib/ChangeLog:
* zlib/contrib/minizip/ioapi.h: Fix spelling in comments.
* zlib/contrib/minizip/miniunz.c: Fix spelling in comments.
* zlib/contrib/minizip/minizip.c: Fix spelling in comments.
* zlib/contrib/minizip/unzip.c: Fix spelling in comments.
* zlib/contrib/minizip/unzip.h: Fix spelling in comments.
* zlib/contrib/minizip/zip.c: Fix spelling in comments.
* zlib/examples/enough.c: Fix spelling in comments.
* zlib/examples/zran.c: Fix spelling in comments.
---
binutils/dwarf.c | 4 ++--
binutils/dwarf.h | 2 +-
binutils/objcopy.c | 2 +-
binutils/od-macho.c | 2 +-
binutils/rclex.c | 2 +-
binutils/readelf.c | 2 +-
binutils/stabs.c | 2 +-
gas/as.h | 2 +-
gas/config/obj-ecoff.c | 2 +-
gas/config/obj-macho.c | 2 +-
gas/config/tc-aarch64.c | 2 +-
gas/config/tc-arc.c | 2 +-
gas/config/tc-arm.c | 10 +++++-----
gas/config/tc-avr.c | 2 +-
gas/config/tc-cr16.c | 4 ++--
gas/config/tc-epiphany.c | 8 ++++----
gas/config/tc-frv.c | 4 ++--
gas/config/tc-hppa.c | 2 +-
gas/config/tc-hppa.h | 2 +-
gas/config/tc-i370.c | 4 ++--
gas/config/tc-m68hc11.c | 2 +-
gas/config/tc-m68k.c | 6 +++---
gas/config/tc-mcore.c | 2 +-
gas/config/tc-mep.c | 8 ++++----
gas/config/tc-metag.c | 6 +++---
gas/config/tc-mips.c | 6 +++---
gas/config/tc-mn10200.c | 2 +-
gas/config/tc-mn10300.c | 4 ++--
gas/config/tc-nds32.c | 8 ++++----
gas/config/tc-nios2.c | 2 +-
gas/config/tc-ns32k.c | 8 ++++----
gas/config/tc-pdp11.c | 2 +-
gas/config/tc-ppc.c | 12 ++++++------
gas/config/tc-riscv.c | 4 ++--
gas/config/tc-rx.c | 4 ++--
gas/config/tc-score.c | 2 +-
gas/config/tc-score7.c | 2 +-
gas/config/tc-sparc.c | 2 +-
gas/config/tc-tic54x.c | 2 +-
gas/config/tc-vax.c | 2 +-
gas/config/tc-xgate.h | 2 +-
gas/config/tc-xtensa.c | 4 ++--
gas/config/tc-z80.c | 2 +-
gas/dwarf2dbg.c | 4 ++--
gas/input-file.h | 2 +-
gas/itbl-ops.c | 2 +-
gas/read.c | 4 ++--
gas/stabs.c | 2 +-
gas/symbols.c | 8 ++++----
gas/testsuite/gas/all/itbl-test.c | 2 +-
gas/testsuite/gas/tic4x/opclasses.h | 10 +++++-----
gas/write.c | 4 ++--
gold/aarch64.cc | 4 ++--
gold/arm.cc | 2 +-
gold/icf.cc | 4 ++--
gold/layout.cc | 2 +-
gold/layout.h | 2 +-
gold/mips.cc | 2 +-
gold/output.h | 2 +-
gold/plugin.h | 2 +-
gold/script-sections.h | 2 +-
gold/script.h | 2 +-
gold/stringpool.h | 2 +-
gold/tilegx.cc | 6 +++---
gprof/basic_blocks.c | 2 +-
gprof/cg_arcs.c | 2 +-
gprof/cg_print.c | 2 +-
gprof/corefile.c | 2 +-
include/ansidecl.h | 2 +-
include/aout/aout64.h | 2 +-
include/aout/encap.h | 2 +-
include/aout/ranlib.h | 2 +-
include/coff/internal.h | 4 ++--
include/coff/sym.h | 12 ++++++------
include/coff/xcoff.h | 4 ++--
include/elf/common.h | 18 +++++++++---------
include/elf/ia64.h | 2 +-
include/elf/metag.h | 2 +-
include/elf/nds32.h | 2 +-
include/gdb/callback.h | 2 +-
include/gdb/remote-sim.h | 14 +++++++-------
include/mach-o/arm.h | 2 +-
include/opcode/alpha.h | 4 ++--
include/opcode/arc.h | 2 +-
include/opcode/hppa.h | 2 +-
include/opcode/ppc.h | 2 +-
include/opcode/tic4x.h | 10 +++++-----
include/opcode/tic6x-insn-formats.h | 2 +-
include/opcode/tic80.h | 2 +-
include/safe-ctype.h | 2 +-
include/splay-tree.h | 2 +-
intl/dcigettext.c | 2 +-
intl/plural.c | 2 +-
ld/deffile.h | 4 ++--
ld/ld.h | 2 +-
ld/ldlang.c | 4 ++--
ld/ldmisc.c | 2 +-
ld/pe-dll.c | 2 +-
libdecnumber/decBasic.c | 2 +-
libiberty/bcopy.c | 2 +-
libiberty/cp-demangle.c | 2 +-
libiberty/cplus-dem.c | 4 ++--
libiberty/make-relative-prefix.c | 2 +-
libiberty/pex-win32.c | 4 ++--
libiberty/random.c | 2 +-
libiberty/regex.c | 2 +-
libiberty/simple-object-mach-o.c | 2 +-
libiberty/strsignal.c | 2 +-
opcodes/aarch64-asm.c | 2 +-
opcodes/aarch64-dis.c | 4 ++--
opcodes/arc-dis.c | 6 +++---
opcodes/arm-dis.c | 8 ++++----
opcodes/cgen-asm.c | 4 ++--
opcodes/cgen-dis.c | 4 ++--
opcodes/cgen-opc.c | 2 +-
opcodes/dis-buf.c | 2 +-
opcodes/epiphany-asm.c | 2 +-
opcodes/epiphany-dis.c | 2 +-
opcodes/fr30-asm.c | 2 +-
opcodes/fr30-dis.c | 2 +-
opcodes/frv-asm.c | 2 +-
opcodes/frv-dis.c | 2 +-
opcodes/frv-opc.c | 2 +-
opcodes/hppa-dis.c | 2 +-
opcodes/i386-dis.c | 2 +-
opcodes/i386-opc.h | 2 +-
opcodes/ip2k-asm.c | 2 +-
opcodes/ip2k-dis.c | 2 +-
opcodes/iq2000-asm.c | 2 +-
opcodes/iq2000-dis.c | 2 +-
opcodes/lm32-asm.c | 2 +-
opcodes/lm32-dis.c | 2 +-
opcodes/m32c-asm.c | 2 +-
opcodes/m32c-dis.c | 2 +-
opcodes/m32r-asm.c | 2 +-
opcodes/m32r-dis.c | 2 +-
opcodes/m68hc11-opc.c | 2 +-
opcodes/m68k-dis.c | 2 +-
opcodes/m68k-opc.c | 2 +-
opcodes/mep-asm.c | 2 +-
opcodes/mep-dis.c | 6 +++---
opcodes/metag-dis.c | 2 +-
opcodes/msp430-decode.c | 2 +-
opcodes/msp430-dis.c | 2 +-
opcodes/mt-asm.c | 2 +-
opcodes/mt-dis.c | 2 +-
opcodes/ns32k-dis.c | 2 +-
opcodes/opintl.h | 2 +-
opcodes/or1k-asm.c | 2 +-
opcodes/or1k-desc.h | 2 +-
opcodes/or1k-dis.c | 2 +-
opcodes/ppc-opc.c | 6 +++---
opcodes/sh-dis.c | 2 +-
opcodes/sh64-dis.c | 2 +-
opcodes/tic30-dis.c | 2 +-
opcodes/v850-opc.c | 2 +-
opcodes/xc16x-asm.c | 2 +-
opcodes/xc16x-dis.c | 2 +-
opcodes/xstormy16-asm.c | 2 +-
opcodes/xstormy16-dis.c | 2 +-
opcodes/xtensa-dis.c | 2 +-
readline/display.c | 2 +-
readline/examples/rlfe/rlfe.c | 2 +-
readline/examples/rlptytest.c | 2 +-
readline/histexpand.c | 4 ++--
readline/history.h | 2 +-
readline/input.c | 2 +-
readline/readline.c | 2 +-
readline/rlprivate.h | 2 +-
readline/text.c | 2 +-
zlib/contrib/minizip/ioapi.h | 2 +-
zlib/contrib/minizip/miniunz.c | 2 +-
zlib/contrib/minizip/minizip.c | 4 ++--
zlib/contrib/minizip/unzip.c | 8 ++++----
zlib/contrib/minizip/unzip.h | 4 ++--
zlib/contrib/minizip/zip.c | 2 +-
zlib/examples/enough.c | 2 +-
zlib/examples/zran.c | 2 +-
178 files changed, 275 insertions(+), 275 deletions(-)
diff --git a/binutils/dwarf.c b/binutils/dwarf.c
index fee6a60..66ad1fd 100644
--- a/binutils/dwarf.c
+++ b/binutils/dwarf.c
@@ -200,7 +200,7 @@ dwarf_vmatoa_1 (const char *fmtch, dwarf_vma value, unsigned num_bytes)
if (num_bytes)
{
- /* Printf does not have a way of specifiying a maximum field width for an
+ /* Printf does not have a way of specifying a maximum field width for an
integer value, so we print the full value into a buffer and then select
the precision we need. */
snprintf (ret, sizeof (buf[0].place), DWARF_VMA_FMT_LONG, value);
@@ -7563,7 +7563,7 @@ dwarf_select_sections_by_names (const char *names)
{ "macro", & do_debug_macinfo, 1 },
{ "pubnames", & do_debug_pubnames, 1 },
{ "pubtypes", & do_debug_pubtypes, 1 },
- /* This entry is for compatability
+ /* This entry is for compatibility
with earlier versions of readelf. */
{ "ranges", & do_debug_aranges, 1 },
{ "rawline", & do_debug_lines, FLAG_DEBUG_LINES_RAW },
diff --git a/binutils/dwarf.h b/binutils/dwarf.h
index ed86810..ac316bb 100644
--- a/binutils/dwarf.h
+++ b/binutils/dwarf.h
@@ -224,7 +224,7 @@ extern void * xcrealloc (void *, size_t, size_t);
extern dwarf_vma read_leb128 (unsigned char *, unsigned int *, bfd_boolean, const unsigned char * const);
-/* A callback into the client. Retuns TRUE if there is a
+/* A callback into the client. Returns TRUE if there is a
relocation against the given debug section at the given
offset. */
extern bfd_boolean reloc_at (struct dwarf_section *, dwarf_vma);
diff --git a/binutils/objcopy.c b/binutils/objcopy.c
index d40cfcb..4910fcf 100644
--- a/binutils/objcopy.c
+++ b/binutils/objcopy.c
@@ -1748,7 +1748,7 @@ add_redefine_syms_file (const char *filename)
free (buf);
}
-/* Copy unkown object file IBFD onto OBFD.
+/* Copy unknown object file IBFD onto OBFD.
Returns TRUE upon success, FALSE otherwise. */
static bfd_boolean
diff --git a/binutils/od-macho.c b/binutils/od-macho.c
index d1a4e0f..0a46adc 100644
--- a/binutils/od-macho.c
+++ b/binutils/od-macho.c
@@ -259,7 +259,7 @@ bfd_mach_o_print_flags (const bfd_mach_o_xlat_name *table,
printf ("-");
}
-/* Print a bfd_uint64_t, using a platform independant style. */
+/* Print a bfd_uint64_t, using a platform independent style. */
static void
printf_uint64 (bfd_uint64_t v)
diff --git a/binutils/rclex.c b/binutils/rclex.c
index 96ed393..564d40f 100644
--- a/binutils/rclex.c
+++ b/binutils/rclex.c
@@ -40,7 +40,7 @@
static int rcdata_mode;
-/* Whether we are supressing lines from cpp (including windows.h or
+/* Whether we are suppressing lines from cpp (including windows.h or
headers from your C sources may bring in externs and typedefs).
When active, we return IGNORED_TOKEN, which lets us ignore these
outside of resource constructs. Thus, it isn't required to protect
diff --git a/binutils/readelf.c b/binutils/readelf.c
index e782e95..547b439 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -9937,7 +9937,7 @@ process_version_sections (FILE * file)
int j;
int isum;
- /* Check for very large indicies. */
+ /* Check for very large indices. */
if (idx > (size_t) (endbuf - (char *) edefs))
break;
diff --git a/binutils/stabs.c b/binutils/stabs.c
index d209094..38b210e 100644
--- a/binutils/stabs.c
+++ b/binutils/stabs.c
@@ -2691,7 +2691,7 @@ parse_stab_members (void *dhandle, struct stab_handle *info,
case '*':
/* virtual member function, followed by index. The sign
bit is supposedly set to distinguish
- pointers-to-methods from virtual function indicies. */
+ pointers-to-methods from virtual function indices. */
++*pp;
voffset = parse_number (pp, (bfd_boolean *) NULL);
if (**pp != ';')
diff --git a/gas/as.h b/gas/as.h
index 9fa9389..cbc5c7c 100644
--- a/gas/as.h
+++ b/gas/as.h
@@ -533,7 +533,7 @@ int generic_force_reloc (struct fix *);
#include "expr.h" /* Before targ-*.h */
-/* This one starts the chain of target dependant headers. */
+/* This one starts the chain of target dependent headers. */
#include "targ-env.h"
#ifdef OBJ_MAYBE_ELF
diff --git a/gas/config/obj-ecoff.c b/gas/config/obj-ecoff.c
index b994986..e337ff1 100644
--- a/gas/config/obj-ecoff.c
+++ b/gas/config/obj-ecoff.c
@@ -53,7 +53,7 @@ ecoff_frob_file_before_fix (void)
This output ordering of sections is magic, on the Alpha, at
least. The .lita section must come before .lit8 and .lit4,
otherwise the OSF/1 linker may silently trash the .lit{4,8}
- section contents. Also, .text must preceed .rdata. These differ
+ section contents. Also, .text must precede .rdata. These differ
from the order described in some parts of the DEC OSF/1 Assembly
Language Programmer's Guide, but that order doesn't seem to work
with their linker.
diff --git a/gas/config/obj-macho.c b/gas/config/obj-macho.c
index 13d0043..9d64ac6 100644
--- a/gas/config/obj-macho.c
+++ b/gas/config/obj-macho.c
@@ -29,7 +29,7 @@
which subsections are generated like __text, __const etc.
The well-known as short-hand section switch directives like .text, .data
- etc. are mapped onto predefined segment/section pairs using facilites
+ etc. are mapped onto predefined segment/section pairs using facilities
supplied by the mach-o port of bfd.
A number of additional mach-o short-hand section switch directives are
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 7c518c7..c71b32b 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -647,7 +647,7 @@ first_error (const char *error)
set_syntax_error (error);
}
-/* Similiar to first_error, but this function accepts formatted error
+/* Similar to first_error, but this function accepts formatted error
message. */
static void
first_error_fmt (const char *format, ...)
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 376ac43..4eb6d6d 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -2659,7 +2659,7 @@ md_pcrel_from_section (fixS *fixP,
/* The hardware calculates relative to the start of the
insn, but this relocation is relative to location of the
LIMM, compensate. The base always needs to be
- substracted by 4 as we do not support this type of PCrel
+ subtracted by 4 as we do not support this type of PCrel
relocation for short instructions. */
base -= 4;
/* Fall through. */
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9a12bcc..6cfd95d 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -3045,7 +3045,7 @@ s_ccs_ref (int unused ATTRIBUTE_UNUSED)
}
/* If name is not NULL, then it is used for marking the beginning of a
- function, wherease if it is NULL then it means the function end. */
+ function, whereas if it is NULL then it means the function end. */
static void
asmfunc_debug (const char * name)
{
@@ -7306,7 +7306,7 @@ parse_operands (char *str, const unsigned int *pattern, bfd_boolean thumb)
The only binary encoding difference is the Coprocessor number. Coprocessor
9 is used for half-precision calculations or conversions. The format of the
- instruction is the same as the equivalent Coprocessor 10 instuction that
+ instruction is the same as the equivalent Coprocessor 10 instruction that
exists for Single-Precision operation. */
static void
@@ -13080,7 +13080,7 @@ do_t_swi (void)
if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6m))
{
if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os)
- /* This only applies to the v6m howver, not later architectures. */
+ /* This only applies to the v6m however, not later architectures. */
&& ! ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7))
as_bad (_("SVC is not permitted on this architecture"));
ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, arm_ext_os);
@@ -17947,7 +17947,7 @@ now_it_add_mask (int cond)
for covering other cases.
Calling handle_it_state () may not transition the IT block state to
- OUTSIDE_IT_BLOCK immediatelly, since the (current) state could be
+ OUTSIDE_IT_BLOCK immediately, since the (current) state could be
still queried. Instead, if the FSM determines that the state should
be transitioned to OUTSIDE_IT_BLOCK, a flag is marked to be closed
after the tencode () function: that's what it_fsm_post_encode () does.
@@ -18038,7 +18038,7 @@ handle_it_state (void)
switch (inst.it_insn_type)
{
case OUTSIDE_IT_INSN:
- /* The closure of the block shall happen immediatelly,
+ /* The closure of the block shall happen immediately,
so any in_it_block () call reports the block as closed. */
force_automatic_it_block_close ();
break;
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c
index ee3140d..568316a 100644
--- a/gas/config/tc-avr.c
+++ b/gas/config/tc-avr.c
@@ -398,7 +398,7 @@ static struct exp_mod_s exp_mod[] =
{"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
};
-/* A union used to store indicies into the exp_mod[] array
+/* A union used to store indices into the exp_mod[] array
in a hash table which expects void * data types. */
typedef union
{
diff --git a/gas/config/tc-cr16.c b/gas/config/tc-cr16.c
index 186cfb9..7a3e9d8 100644
--- a/gas/config/tc-cr16.c
+++ b/gas/config/tc-cr16.c
@@ -1471,7 +1471,7 @@ gettrap (char *s)
if (strcasecmp (trap->name, s) == 0)
return trap->entry;
- /* To make compatable with CR16 4.1 tools, the below 3-lines of
+ /* To make compatible with CR16 4.1 tools, the below 3-lines of
* code added. Refer: Development Tracker item #123 */
for (trap = cr16_traps; trap < (cr16_traps + NUMTRAPS); trap++)
if (trap->entry == (unsigned int) atoi (s))
@@ -2385,7 +2385,7 @@ next_insn:
for (i = 0; i < insn->nargs; i++)
{
- /* For BAL (ra),disp17 instuction only. And also set the
+ /* For BAL (ra),disp17 instruction only. And also set the
DISP24a relocation type. */
if (IS_INSN_MNEMONIC ("bal") && (instruction->size == 2) && i == 0)
{
diff --git a/gas/config/tc-epiphany.c b/gas/config/tc-epiphany.c
index d14c3a0..d7153c5 100644
--- a/gas/config/tc-epiphany.c
+++ b/gas/config/tc-epiphany.c
@@ -288,7 +288,7 @@ epiphany_apply_fix (fixS *fixP, valueT *valP, segT seg)
case BFD_RELOC_EPIPHANY_HIGH:
value >>= 16;
- /* fall thru */
+ /* fall through */
case BFD_RELOC_EPIPHANY_LOW:
value = (((value & 0xff) << 5) | insn[0])
| (insn[1] << 8)
@@ -340,7 +340,7 @@ epiphany_handle_align (fragS *fragp)
}
/* Read a comma separated incrementing list of register names
- and form a bit mask of upto 15 registers 0..14. */
+ and form a bit mask of up to 15 registers 0..14. */
static const char *
parse_reglist (const char * s, int * mask)
@@ -502,7 +502,7 @@ epiphany_assemble (const char *str)
return;
}
}
- /* fall-thru. */
+ /* Fall through. */
case OP4_LDSTRX:
{
@@ -994,7 +994,7 @@ md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
return BFD_RELOC_EPIPHANY_LOW;
else
as_bad ("unknown imm16 operand");
- /* fall-thru */
+ /* fall through */
default:
break;
diff --git a/gas/config/tc-frv.c b/gas/config/tc-frv.c
index f49096d..1767fd9 100644
--- a/gas/config/tc-frv.c
+++ b/gas/config/tc-frv.c
@@ -727,7 +727,7 @@ frv_tomcat_shuffle (enum vliw_nop_type this_nop_type,
buffer[0] |= 0x80;
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
@@ -767,7 +767,7 @@ frv_tomcat_shuffle (enum vliw_nop_type this_nop_type,
}
/* The branch is in the middle. Split this vliw insn into first
- and second parts. Insert the NOP inbetween. */
+ and second parts. Insert the NOP between. */
second_part->insn_list = insert_before_insn;
second_part->insn_list->type = VLIW_BRANCH_HAS_NOPS;
second_part->next = vliw_to_split->next;
diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c
index 2ed06a2..912ce5c 100644
--- a/gas/config/tc-hppa.c
+++ b/gas/config/tc-hppa.c
@@ -1440,7 +1440,7 @@ tc_gen_reloc (asection *section, fixS *fixp)
/* Facilitate hand-crafted unwind info. */
if (strcmp (section->name, UNWIND_SECTION_NAME) == 0)
code = R_PARISC_SEGREL32;
- /* Fall thru */
+ /* Fall through */
default:
reloc->addend = fixp->fx_offset;
diff --git a/gas/config/tc-hppa.h b/gas/config/tc-hppa.h
index 4f3a7cd..aaeff64 100644
--- a/gas/config/tc-hppa.h
+++ b/gas/config/tc-hppa.h
@@ -166,7 +166,7 @@ int hppa_fix_adjustable (struct fix *);
limitations as those for the 32-bit SOM target. */
#define DIFF_EXPR_OK 1
-/* Handle .type psuedo. Given a type string of `millicode', set the
+/* Handle .type pseudo. Given a type string of `millicode', set the
internal elf symbol type to STT_PARISC_MILLI, and return
BSF_FUNCTION for the BFD symbol type. */
#define md_elf_symbol_type(name, sym, elf) \
diff --git a/gas/config/tc-i370.c b/gas/config/tc-i370.c
index 6299cc7..6290f24 100644
--- a/gas/config/tc-i370.c
+++ b/gas/config/tc-i370.c
@@ -1376,7 +1376,7 @@ symbol_locate (symbolS *symbolP,
}
/* i370_addr_offset() will convert operand expressions
- that appear to be absolute into thier base-register
+ that appear to be absolute into their base-register
relative form. These expressions come in two types:
(1) of the form "* + const" * where "*" means
@@ -1482,7 +1482,7 @@ i370_addr_cons (expressionS *exp)
expression (exp);
/* We use a simple string name to collapse together
- multiple refrences to the same address literal. */
+ multiple references to the same address literal. */
name_len = strcspn (sym_name, ", ");
delim = *(sym_name + name_len);
*(sym_name + name_len) = 0x0;
diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c
index 1fc52b1..8f1bbf0 100644
--- a/gas/config/tc-m68hc11.c
+++ b/gas/config/tc-m68hc11.c
@@ -555,7 +555,7 @@ md_parse_option (int c, const char *arg)
current_architecture = cpu6812 | cpu6812s | cpu9s12x;
else if ((strcasecmp (arg, "m9s12xg") == 0)
|| (strcasecmp (arg, "xgate") == 0))
- /* xgate for backwards compatability */
+ /* xgate for backwards compatibility */
current_architecture = cpuxgate;
else
as_bad (_("Option `%s' is not recognized."), arg);
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index 4f64f5c..56e5599 100644
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -513,7 +513,7 @@ struct m68k_cpu
unsigned long arch; /* Architecture features. */
const enum m68k_register *control_regs; /* Control regs on chip */
const char *name; /* Name */
- int alias; /* Alias for a cannonical name. If 1, then
+ int alias; /* Alias for a canonical name. If 1, then
succeeds canonical name, if -1 then
succeeds canonical name, if <-1 ||>1 this is a
deprecated name, and the next/previous name
@@ -1469,7 +1469,7 @@ m68k_ip (char *instring)
char *old = input_line_pointer;
*old = '\n';
input_line_pointer = p;
- /* Ahh - it's a motorola style psuedo op. */
+ /* Ahh - it's a motorola style pseudo op. */
mote_pseudo_table[opcode->m_opnum].poc_handler
(mote_pseudo_table[opcode->m_opnum].poc_val);
input_line_pointer = old;
@@ -4597,7 +4597,7 @@ md_begin (void)
m68k_rel32 = 0;
}
- /* First sort the opcode table into alphabetical order to seperate
+ /* First sort the opcode table into alphabetical order to separate
the order that the assembler wants to see the opcodes from the
order that the disassembler wants to see them. */
m68k_sorted_opcodes = XNEWVEC (const struct m68k_opcode *, m68k_numopcodes);
diff --git a/gas/config/tc-mcore.c b/gas/config/tc-mcore.c
index ec03a29..0eea818 100644
--- a/gas/config/tc-mcore.c
+++ b/gas/config/tc-mcore.c
@@ -1766,7 +1766,7 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
case C (COND_JUMP, DISP32):
case C (COND_JUMP, UNDEF_WORD_DISP):
{
- /* A conditional branch wont fit into 12 bits so:
+ /* A conditional branch won't fit into 12 bits so:
b!cond 1f
jmpi 0f
.align 2
diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c
index dac10c9..bec757f 100644
--- a/gas/config/tc-mep.c
+++ b/gas/config/tc-mep.c
@@ -1146,7 +1146,7 @@ mep_check_ivc2_scheduling (void)
/* The scheduling functions are just filters for invalid combinations.
If there is a violation, they terminate assembly. Otherise they
- just fall through. Succesful combinations cause no side effects
+ just fall through. Successful combinations cause no side effects
other than valid nop insertion. */
static void
@@ -1219,7 +1219,7 @@ md_assemble (char * str)
+ copro insn
We want to handle the general case where more than
- one instruction can be preceeded by a +. This will
+ one instruction can be preceded by a +. This will
happen later if we add support for internally parallel
coprocessors. We'll make the parsing nice and general
so that it can handle an arbitrary number of insns
@@ -1299,7 +1299,7 @@ md_assemble (char * str)
/* Check for a + with a core insn and abort if found. */
if (!thisInsnIsCopro)
{
- as_fatal("A core insn cannot be preceeded by a +.\n");
+ as_fatal("A core insn cannot be preceded by a +.\n");
return;
}
@@ -2185,7 +2185,7 @@ mep_cleanup (void)
{
/* Take care of any insns left to be parallelized when the file ends.
This is mainly here to handle the case where the file ends with an
- insn preceeded by a + or the file ends unexpectedly. */
+ insn preceded by a + or the file ends unexpectedly. */
if (mode == VLIW)
mep_process_saved_insns ();
}
diff --git a/gas/config/tc-metag.c b/gas/config/tc-metag.c
index b56f9d2..3e81629 100644
--- a/gas/config/tc-metag.c
+++ b/gas/config/tc-metag.c
@@ -4717,7 +4717,7 @@ parse_dtemplate (const char *line, metag_insn *insn,
return l;
}
-/* Parse a DSP Template definiton memory reference, e.g
+/* Parse a DSP Template definition memory reference, e.g
[A0.7+A0.5++]. DSPRAM is set to true by this function if this
template definition is a DSP RAM template definition. */
static const char *
@@ -4739,7 +4739,7 @@ template_mem_ref(const char *line, metag_addr *addr,
return l;
}
-/* Sets LOAD to TRUE if this is a Template load definiton (otherwise
+/* Sets LOAD to TRUE if this is a Template load definition (otherwise
it's a store). Fills out ADDR, TEMPLATE_REG and ADDR_UNIT. */
static const char *
parse_template_regs (const char *line, bfd_boolean *load,
@@ -5626,7 +5626,7 @@ parse_dalu (const char *line, metag_insn *insn,
if ((template->meta_opcode >> 26) & 0x1)
ls_shift = INVALID_SHIFT;
- /* The Condition Is Always (CA) bit must be set if we're targetting a
+ /* The Condition Is Always (CA) bit must be set if we're targeting a
Ux.r register as the destination. This means that we can't have
any other condition bits set. */
if (!is_same_data_unit (regs[1]->unit, regs[0]->unit))
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 283ed80..a9d6f6b 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -4711,7 +4711,7 @@ struct mips_arg_info
unsigned int last_op_int;
/* If true, match routines should assume that no later instruction
- alternative matches and should therefore be as accomodating as
+ alternative matches and should therefore be as accommodating as
possible. Match routines should not report errors if something
is only invalid for !LAX_MATCH. */
bfd_boolean lax_match;
@@ -9785,7 +9785,7 @@ small_offset_p (unsigned int range, unsigned int align, unsigned int offbits)
* optimizing code generation.
* One interesting optimization is when several store macros appear
* consecutively that would load AT with the upper half of the same address.
- * The ensuing load upper instructions are ommited. This implies some kind
+ * The ensuing load upper instructions are omitted. This implies some kind
* of global optimization. We currently only optimize within a single macro.
* For many of the load and store macros if the address is specified as a
* constant expression in the first 64k of memory (ie ld $2,0x4000c) we
@@ -11809,7 +11809,7 @@ macro (struct mips_cl_insn *ip, char *str)
else if (offbits != 16)
{
/* The offset field is too narrow to be used for a low-part
- relocation, so load the whole address into the auxillary
+ relocation, so load the whole address into the auxiliary
register. */
load_address (tempreg, &offset_expr, &used_at);
if (breg != 0)
diff --git a/gas/config/tc-mn10200.c b/gas/config/tc-mn10200.c
index 8275c1a..2db07ef 100644
--- a/gas/config/tc-mn10200.c
+++ b/gas/config/tc-mn10200.c
@@ -1161,7 +1161,7 @@ keep_going:
as the size of a pointer, so we need a union to convert
the opindex field of the fr_cgen structure into a char *
so that it can be stored in the frag. We do not have
- to worry about loosing accuracy as we are not going to
+ to worry about losing accuracy as we are not going to
be even close to the 32bit limit of the int. */
union
{
diff --git a/gas/config/tc-mn10300.c b/gas/config/tc-mn10300.c
index 4ce2ee4..6f9c3cc 100644
--- a/gas/config/tc-mn10300.c
+++ b/gas/config/tc-mn10300.c
@@ -1865,7 +1865,7 @@ keep_going:
as the size of a pointer, so we need a union to convert
the opindex field of the fr_cgen structure into a char *
so that it can be stored in the frag. We do not have
- to worry about loosing accuracy as we are not going to
+ to worry about losing accuracy as we are not going to
be even close to the 32bit limit of the int. */
union
{
@@ -2618,7 +2618,7 @@ mn10300_handle_align (fragS *frag)
relocs will prevent the contents from being merged. */
&& (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
/* Create a new fixup to record the alignment request. The symbol is
- irrelevent but must be present so we use the absolute section symbol.
+ irrelevant but must be present so we use the absolute section symbol.
The offset from the symbol is used to record the power-of-two alignment
value. The size is set to 0 because the frag may already be aligned,
thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
diff --git a/gas/config/tc-nds32.c b/gas/config/tc-nds32.c
index de59f46..8696724 100644
--- a/gas/config/tc-nds32.c
+++ b/gas/config/tc-nds32.c
@@ -91,7 +91,7 @@ static int enable_relax_relocs = 1;
static int enable_relax_ex9 = 0;
/* The value will be used in RELAX_ENTRY. */
static int enable_relax_ifc = 0;
-/* Save option -O for perfomance. */
+/* Save option -O for performance. */
static int optimize = 0;
/* Save option -Os for code size. */
static int optimize_for_space = 0;
@@ -5233,7 +5233,7 @@ md_assemble (char *str)
if (!nds32_check_insn_available (insn, str))
return;
- /* Make sure the begining of text being 2-byte align. */
+ /* Make sure the beginning of text being 2-byte align. */
nds32_adjust_label (1);
fld = insn.field;
/* Try to allocate the max size to guarantee relaxable same branch
@@ -6440,7 +6440,7 @@ elf_nds32_final_processing (void)
elf_elfheader (stdoutput)->e_flags |= nds32_elf_flags;
}
-/* Implement md_apply_fix. Apply the fix-up or tranform the fix-up for
+/* Implement md_apply_fix. Apply the fix-up or transform the fix-up for
later relocation generation. */
void
@@ -6463,7 +6463,7 @@ nds32_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
fixP->fx_addnumber = value;
fixP->tc_fix_data = NULL;
- /* Tranform specific relocations here for later relocation generation.
+ /* Transform specific relocations here for later relocation generation.
Tag data here for ex9 relaxtion and tag tls data for linker. */
switch (fixP->fx_r_type)
{
diff --git a/gas/config/tc-nios2.c b/gas/config/tc-nios2.c
index 0a1286a..3e12eee 100644
--- a/gas/config/tc-nios2.c
+++ b/gas/config/tc-nios2.c
@@ -206,7 +206,7 @@ static segT nios2_current_align_seg;
static int nios2_auto_align_on = 1;
/* The last seen label in the current section. This is used to auto-align
- labels preceeding instructions. */
+ labels preceding instructions. */
static symbolS *nios2_last_label;
/* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries
diff --git a/gas/config/tc-ns32k.c b/gas/config/tc-ns32k.c
index 570916d..f3059be 100644
--- a/gas/config/tc-ns32k.c
+++ b/gas/config/tc-ns32k.c
@@ -333,7 +333,7 @@ const pseudo_typeS md_pseudo_table[] =
displacement base-adjust as there are other routines that must
consider this. Also, as we have two various offset-adjusts in the
ns32k (acb versus br/brs/jsr/bcond), two set of limits would have
- had to be used. Now we dont have to think about that. */
+ had to be used. Now we don't have to think about that. */
const relax_typeS md_relax_table[] =
{
@@ -985,10 +985,10 @@ encode_operand (int argc,
argv[i] = freeptr;
pcrel -= 1; /* Make pcrel 0 in spite of what case 'p':
wants. */
- /* fall thru */
+ /* fall through */
case 'p': /* Displacement - pc relative addressing. */
pcrel += 1;
- /* fall thru */
+ /* fall through */
case 'd': /* Displacement. */
iif.instr_size += suffixP[i] ? suffixP[i] : 4;
IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
@@ -1818,7 +1818,7 @@ convert_iif (void)
{
/* Frag it. */
if (exprP.X_op_symbol)
- /* We cant relax this case. */
+ /* We can't relax this case. */
as_fatal (_("Can't relax difference"));
else
{
diff --git a/gas/config/tc-pdp11.c b/gas/config/tc-pdp11.c
index f6cf025..d343194 100644
--- a/gas/config/tc-pdp11.c
+++ b/gas/config/tc-pdp11.c
@@ -1286,7 +1286,7 @@ md_show_usage (FILE *stream)
{
fprintf (stream, "\
\n\
-PDP-11 instruction set extentions:\n\
+PDP-11 instruction set extensions:\n\
\n\
-m(no-)cis allow (disallow) commersial instruction set\n\
-m(no-)csm allow (disallow) CSM instruction\n\
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 5c7b09f..d9fedff 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -2968,7 +2968,7 @@ md_assemble (char *str)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC64_ADDR16_HIGH:
ex.X_add_number = PPC_HI (ex.X_add_number);
@@ -2990,7 +2990,7 @@ md_assemble (char *str)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC64_ADDR16_HIGHA:
ex.X_add_number = PPC_HA (ex.X_add_number);
@@ -6595,7 +6595,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC_VLE_HI16A:
case BFD_RELOC_PPC_VLE_HI16D:
@@ -6618,7 +6618,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
break;
}
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC_VLE_HA16A:
case BFD_RELOC_PPC_VLE_HA16D:
@@ -6760,7 +6760,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
gas_assert (fixP->fx_addsy != NULL);
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_PPC_TLS:
case BFD_RELOC_PPC_TLSGD:
@@ -6884,7 +6884,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
&& !S_IS_DEFINED (fixP->fx_addsy)
&& !S_IS_WEAK (fixP->fx_addsy))
S_SET_WEAK (fixP->fx_addsy);
- /* Fall thru */
+ /* Fall through */
case BFD_RELOC_VTABLE_ENTRY:
fixP->fx_done = 0;
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 592c95a..3a4ddcf 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -554,7 +554,7 @@ validate_riscv_insn (const struct riscv_opcode *opc)
case 'I': break;
case 'R': USE_BITS (OP_MASK_RS3, OP_SH_RS3); break;
case 'S': USE_BITS (OP_MASK_RS1, OP_SH_RS1); break;
- case 'U': USE_BITS (OP_MASK_RS1, OP_SH_RS1); /* fallthru */
+ case 'U': USE_BITS (OP_MASK_RS1, OP_SH_RS1); /* fall through */
case 'T': USE_BITS (OP_MASK_RS2, OP_SH_RS2); break;
case 'd': USE_BITS (OP_MASK_RD, OP_SH_RD); break;
case 'm': USE_BITS (OP_MASK_RM, OP_SH_RM); break;
@@ -1545,7 +1545,7 @@ rvc_lui:
break;
case 'U':
INSERT_OPERAND (RS1, *ip, regno);
- /* fallthru */
+ /* fall through */
case 'T':
INSERT_OPERAND (RS2, *ip, regno);
break;
diff --git a/gas/config/tc-rx.c b/gas/config/tc-rx.c
index 07dccc6..575ed4b 100644
--- a/gas/config/tc-rx.c
+++ b/gas/config/tc-rx.c
@@ -1077,7 +1077,7 @@ scan_for_infix_rx_pseudo_ops (char * str)
if (dot == NULL || dot == str)
return FALSE;
- /* A real pseudo-op must be preceeded by whitespace. */
+ /* A real pseudo-op must be preceded by whitespace. */
if (dot[-1] != ' ' && dot[-1] != '\t')
return FALSE;
@@ -2671,7 +2671,7 @@ rx_elf_final_processing (void)
elf_elfheader (stdoutput)->e_flags |= elf_flags;
}
-/* Scan the current input line for occurances of Renesas
+/* Scan the current input line for occurrences of Renesas
local labels and replace them with the GAS version. */
void
diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c
index f68cc6f..2b0c0a8 100644
--- a/gas/config/tc-score.c
+++ b/gas/config/tc-score.c
@@ -7250,7 +7250,7 @@ s3_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
else
{
- /* In differnt section. */
+ /* In different section. */
if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) ||
(fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy)))
value = fixP->fx_offset;
diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c
index d7dd108..ee96348 100644
--- a/gas/config/tc-score7.c
+++ b/gas/config/tc-score7.c
@@ -6787,7 +6787,7 @@ s7_apply_fix (fixS *fixP, valueT *valP, segT seg)
}
else
{
- /* In differnt section. */
+ /* In different section. */
if ((S_GET_SEGMENT (fixP->fx_addsy) != seg) ||
(fixP->fx_addsy != NULL && S_IS_EXTERNAL (fixP->fx_addsy)))
value = fixP->fx_offset;
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
index d7b9a98..aa4c112 100644
--- a/gas/config/tc-sparc.c
+++ b/gas/config/tc-sparc.c
@@ -1271,7 +1271,7 @@ BSR (bfd_vma val, int amount)
static char *expr_end;
/* Values for `special_case'.
- Instructions that require wierd handling because they're longer than
+ Instructions that require weird handling because they're longer than
4 bytes. */
#define SPECIAL_CASE_NONE 0
#define SPECIAL_CASE_SET 1
diff --git a/gas/config/tc-tic54x.c b/gas/config/tc-tic54x.c
index 409e4a0..09fd12a 100644
--- a/gas/config/tc-tic54x.c
+++ b/gas/config/tc-tic54x.c
@@ -1670,7 +1670,7 @@ tic54x_align_words (int arg)
s_align_bytes (count << 1);
}
-/* Initialize multiple-bit fields withing a single word of memory. */
+/* Initialize multiple-bit fields within a single word of memory. */
static void
tic54x_field (int ignore ATTRIBUTE_UNUSED)
diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c
index e358c84..7e0aa04 100644
--- a/gas/config/tc-vax.c
+++ b/gas/config/tc-vax.c
@@ -188,7 +188,7 @@ int flag_want_pic; /* -k */
#define BB (1+-128)
#define WF (2+ 32767)
#define WB (2+-32768)
-/* Dont need LF, LB because they always reach. [They are coded as 0.] */
+/* Don't need LF, LB because they always reach. [They are coded as 0.] */
#define C(a,b) ENCODE_RELAX(a,b)
/* This macro has no side-effects. */
diff --git a/gas/config/tc-xgate.h b/gas/config/tc-xgate.h
index cce73ae..ad6ccf4 100644
--- a/gas/config/tc-xgate.h
+++ b/gas/config/tc-xgate.h
@@ -75,7 +75,7 @@ extern struct relax_type md_relax_table[];
/* GAS only handles relaxations for pc-relative data targeting addresses
in the same segment, we have to encode all other cases */
-/* FIXME: impliment this. */
+/* FIXME: implement this. */
/* #define md_relax_frag(SEG, FRAGP, STRETCH) \
((FRAGP)->fr_symbol != NULL \
&& S_GET_SEGMENT ((FRAGP)->fr_symbol) == (SEG) \
diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c
index ca261ae..b4a3222 100644
--- a/gas/config/tc-xtensa.c
+++ b/gas/config/tc-xtensa.c
@@ -5507,7 +5507,7 @@ md_assemble (char *str)
orig_insn.is_specific_opcode = (has_underbar || !use_transform ());
orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
- /* Special case: Check for "CALLXn.TLS" psuedo op. If found, grab its
+ /* Special case: Check for "CALLXn.TLS" pseudo op. If found, grab its
extra argument and set the opcode to "CALLXn". */
if (orig_insn.opcode == XTENSA_UNDEFINED
&& strncasecmp (opname, "callx", 5) == 0)
@@ -5556,7 +5556,7 @@ md_assemble (char *str)
}
}
- /* Special case: Check for "j.l" psuedo op. */
+ /* Special case: Check for "j.l" pseudo op. */
if (orig_insn.opcode == XTENSA_UNDEFINED
&& strncasecmp (opname, "j.l", 3) == 0)
{
diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c
index b7e075a..0953541 100644
--- a/gas/config/tc-z80.c
+++ b/gas/config/tc-z80.c
@@ -540,7 +540,7 @@ contains_register(symbolS *sym)
return 0;
}
-/* Parse general expression, not loooking for indexed adressing. */
+/* Parse general expression, not loooking for indexed addressing. */
static const char *
parse_exp_not_indexed (const char *s, expressionS *op)
{
diff --git a/gas/dwarf2dbg.c b/gas/dwarf2dbg.c
index 61268a8..0757edb 100644
--- a/gas/dwarf2dbg.c
+++ b/gas/dwarf2dbg.c
@@ -1223,7 +1223,7 @@ dwarf2dbg_convert_frag (fragS *frag)
if (DWARF2_USE_FIXED_ADVANCE_PC)
{
- /* If linker relaxation is enabled then the distance bewteen the two
+ /* If linker relaxation is enabled then the distance between the two
symbols in the frag->fr_symbol expression might change. Hence we
cannot rely upon the value computed by resolve_symbol_value.
Instead we leave the expression unfinalized and allow
@@ -1280,7 +1280,7 @@ process_entries (segT seg, struct line_entry *e)
char * name;
const char * sec_name;
- /* Switch to the relevent sub-section before we start to emit
+ /* Switch to the relevant sub-section before we start to emit
the line number table.
FIXME: These sub-sections do not have a normal Line Number
diff --git a/gas/input-file.h b/gas/input-file.h
index 3581046..dd18415 100644
--- a/gas/input-file.h
+++ b/gas/input-file.h
@@ -18,7 +18,7 @@
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
-/*"input_file.c":Operating-system dependant functions to read source files.*/
+/*"input_file.c":Operating-system dependent functions to read source files.*/
/*
* No matter what the operating system, this module must provide the
diff --git a/gas/itbl-ops.c b/gas/itbl-ops.c
index 488e3be..d6f99ff 100644
--- a/gas/itbl-ops.c
+++ b/gas/itbl-ops.c
@@ -540,7 +540,7 @@ itbl_assemble (char *name, char *s)
return 0; /-* error; invalid operand *-/
break;
*/
- /* If not a symbol, fall thru to IMMED */
+ /* If not a symbol, fall through to IMMED */
case e_immed:
if (*n == '0' && *(n + 1) == 'x') /* hex begins 0x... */
{
diff --git a/gas/read.c b/gas/read.c
index a940ff3..2a93c9c 100644
--- a/gas/read.c
+++ b/gas/read.c
@@ -4085,14 +4085,14 @@ s_reloc (int ignore ATTRIBUTE_UNUSED)
case O_constant:
exp.X_add_symbol = section_symbol (now_seg);
exp.X_op = O_symbol;
- /* Fall thru */
+ /* Fall through */
case O_symbol:
if (exp.X_add_number == 0)
{
reloc->u.a.offset_sym = exp.X_add_symbol;
break;
}
- /* Fall thru */
+ /* Fall through */
default:
reloc->u.a.offset_sym = make_expr_symbol (&exp);
break;
diff --git a/gas/stabs.c b/gas/stabs.c
index 916594c..2d87387 100644
--- a/gas/stabs.c
+++ b/gas/stabs.c
@@ -597,7 +597,7 @@ stabs_generate_asm_lineno (void)
/* Don't emit sequences of stabs for the same line. */
if (prev_file == NULL)
{
- /* First time thru. */
+ /* First time through. */
prev_file = xstrdup (file);
prev_lineno = lineno;
}
diff --git a/gas/symbols.c b/gas/symbols.c
index 082b2c7..17222b8 100644
--- a/gas/symbols.c
+++ b/gas/symbols.c
@@ -262,7 +262,7 @@ define_sym_at_dot (symbolS *symbolP)
symbolS *
colon (/* Just seen "x:" - rattle symbols & frags. */
- const char *sym_name /* Symbol name, as a cannonical string. */
+ const char *sym_name /* Symbol name, as a canonical string. */
/* We copy this string: OK to alter later. */)
{
symbolS *symbolP; /* Symbol we are working with. */
@@ -1541,7 +1541,7 @@ snapshot_symbol (symbolS **symbolPP, valueT *valueP, segT *segP, fragS **fragPP)
case O_register:
if (!symbol_equated_p (symbolP))
break;
- /* Fall thru. */
+ /* Fall through. */
case O_symbol:
case O_symbol_rva:
symbolP = exp.X_add_symbol;
@@ -1661,7 +1661,7 @@ define_dollar_label (long label)
/* Caller must copy returned name: we re-use the area for the next name.
- The mth occurence of label n: is turned into the symbol "Ln^Am"
+ The mth occurrence of label n: is turned into the symbol "Ln^Am"
where n is the label number and m is the instance number. "L" makes
it a label discarded unless debugging and "^A"('\1') ensures no
ordinary symbol SHOULD get the same name as a local label
@@ -1826,7 +1826,7 @@ fb_label_instance (long label)
/* Caller must copy returned name: we re-use the area for the next name.
- The mth occurence of label n: is turned into the symbol "Ln^Bm"
+ The mth occurrence of label n: is turned into the symbol "Ln^Bm"
where n is the label number and m is the instance number. "L" makes
it a label discarded unless debugging and "^B"('\2') ensures no
ordinary symbol SHOULD get the same name as a local label
diff --git a/gas/testsuite/gas/all/itbl-test.c b/gas/testsuite/gas/all/itbl-test.c
index 97b8601..f6f2fd3 100644
--- a/gas/testsuite/gas/all/itbl-test.c
+++ b/gas/testsuite/gas/all/itbl-test.c
@@ -116,7 +116,7 @@ test_reg (e_processor processor, e_type type, char *name,
printf ("name=%s found for processor=%d, type=%d, val=%d\n",
n, processor, type, val);
- /* We require that names be unique amoung processors and types. */
+ /* We require that names be unique among processors and types. */
if (! itbl_get_reg_val (name, &v)
|| v != val)
printf ("Error - reg val not found for processor=%d, type=%d, name=%s\n",
diff --git a/gas/testsuite/gas/tic4x/opclasses.h b/gas/testsuite/gas/tic4x/opclasses.h
index 3fb3524..b12cc65 100644
--- a/gas/testsuite/gas/tic4x/opclasses.h
+++ b/gas/testsuite/gas/tic4x/opclasses.h
@@ -324,7 +324,7 @@ nameb##_J: &\
.endif
-/* LL: Load-load parallell operation
+/* LL: Load-load parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Indirect 0,1,IR0,IR1 (J)
dst1 = Register 0-7 (K)
@@ -352,7 +352,7 @@ name##_LL_enh: &\
-/* LS: Store-store parallell operation
+/* LS: Store-store parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Register 0-7 (H)
dst1 = Indirect 0,1,IR0,IR1 (J)
@@ -645,7 +645,7 @@ nameb##3_##namea##3_M_enh:
nameb##3 AR0, R0, R2 &|| namea##3 R0, AR0, R0 /* i;H;M|K;j;N */ &\
.endif
-/* P: General 2-operand operation with parallell store
+/* P: General 2-operand operation with parallel store
Syntax: <ia> src2, dst1 || <ib> src3, dst2
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
dst1 = Register 0-7 (L)
@@ -671,7 +671,7 @@ namea##_##nameb##_P_enh: &\
.endif
-/* Q: General 3-operand operation with parallell store
+/* Q: General 3-operand operation with parallel store
Syntax: <ia> src1, src2, dst1 || <ib> src3, dst2
src1 = Register 0-7 (K)
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
@@ -708,7 +708,7 @@ namea##3_##nameb##_Q_enh:
.endif
-/* QC: General commutative 3-operand operation with parallell store
+/* QC: General commutative 3-operand operation with parallel store
Syntax: <ia> src2, src1, dst1 || <ib> src3, dst2
<ia> src1, src2, dst1 || <ib> src3, dst2 - Manual
src1 = Register 0-7 (K)
diff --git a/gas/write.c b/gas/write.c
index c502b08..99b4812 100644
--- a/gas/write.c
+++ b/gas/write.c
@@ -1458,7 +1458,7 @@ compress_debug (bfd *abfd, asection *sec, void *xxx ATTRIBUTE_UNUSED)
compressed_size = header_size;
/* Stream the frags through the compression engine, adding new frags
- as necessary to accomodate the compressed output. */
+ as necessary to accommodate the compressed output. */
for (f = seginfo->frchainP->frch_root;
f;
f = f->fr_next)
@@ -1835,7 +1835,7 @@ write_object_file (void)
#endif
/* From now on, we don't care about sub-segments. Build one frag chain
- for each segment. Linked thru fr_next. */
+ for each segment. Linked through fr_next. */
/* Remove the sections created by gas for its own purposes. */
{
diff --git a/gold/aarch64.cc b/gold/aarch64.cc
index 28e4d48..f38cd9a 100644
--- a/gold/aarch64.cc
+++ b/gold/aarch64.cc
@@ -156,7 +156,7 @@ public:
uint64_t imm = ((adrp >> 29) & mask2) | (((adrp >> 5) & mask19) << 2);
// Retrieve msb of 21-bit-signed imm for sign extension.
uint64_t msbt = (imm >> 20) & 1;
- // Real value is imm multipled by 4k. Value now has 33-bit information.
+ // Real value is imm multiplied by 4k. Value now has 33-bit information.
int64_t value = imm << 12;
// Sign extend to 64-bit by repeating msbt 31 (64-33) times and merge it
// with value.
@@ -1022,7 +1022,7 @@ public:
{ this->erratum_address_ = addr; }
// Comparator used to group Erratum_stubs in a set by (obj, shndx,
- // sh_offset). We do not include 'type' in the calculation, becuase there is
+ // sh_offset). We do not include 'type' in the calculation, because there is
// at most one stub type at (obj, shndx, sh_offset).
bool
operator<(const Erratum_stub<size, big_endian>& k) const
diff --git a/gold/arm.cc b/gold/arm.cc
index b51612c..e351ad9 100644
--- a/gold/arm.cc
+++ b/gold/arm.cc
@@ -11215,7 +11215,7 @@ Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
{
case 0:
// Integer divide allowed if instruction contained in
- // archetecture.
+ // architecture.
if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
return true;
else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
diff --git a/gold/icf.cc b/gold/icf.cc
index c09c746..e86436a 100644
--- a/gold/icf.cc
+++ b/gold/icf.cc
@@ -545,7 +545,7 @@ get_section_contents(bool first_iteration,
{
buffer.append("Contents = ");
buffer.append(reinterpret_cast<const char*>(contents), plen);
- // Store the section contents that dont change to avoid recomputing
+ // Store the section contents that don't change to avoid recomputing
// during the next call to this function.
(*section_contents)[section_num] = buffer;
}
@@ -670,7 +670,7 @@ match_sections(unsigned int iteration_num,
// Check section alignment here.
// The section with the larger alignment requirement
// should be kept. We assume alignment can only be
- // zero or postive integral powers of two.
+ // zero or positive integral powers of two.
uint64_t align_i = section_addraligns[i];
uint64_t align_kept = section_addraligns[kept_section];
if (align_i <= align_kept)
diff --git a/gold/layout.cc b/gold/layout.cc
index d14f27b..789bcc1 100644
--- a/gold/layout.cc
+++ b/gold/layout.cc
@@ -2581,7 +2581,7 @@ Layout::relaxation_loop_body(
return off;
}
-// Search the list of patterns and find the postion of the given section
+// Search the list of patterns and find the position of the given section
// name in the output section. If the section name matches a glob
// pattern and a non-glob name, then the non-glob position takes
// precedence. Return 0 if no match is found.
diff --git a/gold/layout.h b/gold/layout.h
index b2d699f..2263f0e 100644
--- a/gold/layout.h
+++ b/gold/layout.h
@@ -539,7 +539,7 @@ class Layout
// and ALIGN are the extra flags and alignment of the segment.
struct Unique_segment_info
{
- // Identifier for the segment. ELF segments dont have names. This
+ // Identifier for the segment. ELF segments don't have names. This
// is used as the name of the output section mapped to the segment.
const char* name;
// Additional segment flags.
diff --git a/gold/mips.cc b/gold/mips.cc
index 61b3513..2ed73b2 100644
--- a/gold/mips.cc
+++ b/gold/mips.cc
@@ -9742,7 +9742,7 @@ Target_mips<size, big_endian>::do_finalize_sections(Layout* layout,
d_val = elfcpp::RHF_NOTPOT;
odyn->add_constant(elfcpp::DT_MIPS_FLAGS, d_val);
- // Save layout for using when emiting custom dynamic tags.
+ // Save layout for using when emitting custom dynamic tags.
this->layout_ = layout;
// This member holds the base address of the segment.
diff --git a/gold/output.h b/gold/output.h
index 6b9186b..62386a6 100644
--- a/gold/output.h
+++ b/gold/output.h
@@ -2874,7 +2874,7 @@ class Output_data_dynamic : public Output_section_data
DYNAMIC_NUMBER = -1U,
// Section size.
DYNAMIC_SECTION_SIZE = -2U,
- // Symbol adress.
+ // Symbol address.
DYNAMIC_SYMBOL = -3U,
// String.
DYNAMIC_STRING = -4U,
diff --git a/gold/plugin.h b/gold/plugin.h
index 652ec58..0348eb7 100644
--- a/gold/plugin.h
+++ b/gold/plugin.h
@@ -378,7 +378,7 @@ class Plugin_manager
Mapfile* mapfile_;
Task_token* this_blocker_;
- // An extra directory to seach for the libraries passed by
+ // An extra directory to search for the libraries passed by
// add_input_library.
std::string extra_search_path_;
Lock* lock_;
diff --git a/gold/script-sections.h b/gold/script-sections.h
index 30fd96d..6e108fa 100644
--- a/gold/script-sections.h
+++ b/gold/script-sections.h
@@ -279,7 +279,7 @@ class Script_sections
size_t
total_header_size(Layout* layout) const;
- // Return the amount we have to subtract from the LMA to accomodate
+ // Return the amount we have to subtract from the LMA to accommodate
// headers of the given size.
uint64_t
header_size_adjustment(uint64_t lma, size_t sizeof_headers) const;
diff --git a/gold/script.h b/gold/script.h
index d81391b..d0cae11 100644
--- a/gold/script.h
+++ b/gold/script.h
@@ -538,7 +538,7 @@ class Script_options
// SECTIONS clause.
typedef std::vector<Symbol_assignment*> Symbol_assignments;
- // We keep a list of all assertions whcih occur outside of a
+ // We keep a list of all assertions which occur outside of a
// SECTIONS clause.
typedef std::vector<Script_assertion*> Assertions;
diff --git a/gold/stringpool.h b/gold/stringpool.h
index b7ac54f..a2b3ebd 100644
--- a/gold/stringpool.h
+++ b/gold/stringpool.h
@@ -118,7 +118,7 @@ class Chunked_vector
{
this->chunks_.resize((n + chunk_size - 1) / chunk_size);
// We need to call reserve() of all chunks since changing
- // this->chunks_ casues Element_vectors to be copied. The
+ // this->chunks_ causes Element_vectors to be copied. The
// reserved capacity of an Element_vector may be lost in copying.
for (size_t i = 0; i < this->chunks_.size(); ++i)
this->chunks_[i].reserve(chunk_size);
diff --git a/gold/tilegx.cc b/gold/tilegx.cc
index 03b1a50..7ab99ab 100644
--- a/gold/tilegx.cc
+++ b/gold/tilegx.cc
@@ -2527,7 +2527,7 @@ Target_tilegx<size, big_endian>::make_plt_section(Symbol_table* symtab,
this->got_section(symtab, layout);
// Ensure that .rela.dyn always appears before .rela.plt,
- // becuase on TILE-Gx, .rela.dyn needs to include .rela.plt
+ // because on TILE-Gx, .rela.dyn needs to include .rela.plt
// in it's range.
this->rela_dyn_section(layout);
@@ -3375,7 +3375,7 @@ Target_tilegx<size, big_endian>::Scan::local(Symbol_table* symtab,
// tilegx dynamic linker will not update local got entry,
// so, if we are generating a shared object, we need to add a
// dynamic relocation for this symbol's GOT entry to inform
- // dynamic linker plus the load base explictly.
+ // dynamic linker plus the load base explicitly.
if (parameters->options().output_is_position_independent())
{
unsigned int got_offset
@@ -3431,7 +3431,7 @@ Target_tilegx<size, big_endian>::Scan::local(Symbol_table* symtab,
//
// R_TILEGX_TLS_GD_CALL implicitly reference __tls_get_addr,
// while all other target, x86/arm/mips/powerpc/sparc
- // generate tls relocation against __tls_get_addr explictly,
+ // generate tls relocation against __tls_get_addr explicitly,
// so for TILEGX, we need the following hack.
if (opt_t == tls::TLSOPT_NONE) {
if (!target->tls_get_addr_sym_defined_) {
diff --git a/gprof/basic_blocks.c b/gprof/basic_blocks.c
index a588b2e..4e29599 100644
--- a/gprof/basic_blocks.c
+++ b/gprof/basic_blocks.c
@@ -311,7 +311,7 @@ print_exec_counts (void)
line of a file in sequential order.
Global variable bb_annotate_all_lines enables execution count
- compression (counts are supressed if identical to the last one)
+ compression (counts are suppressed if identical to the last one)
and prints counts on all executed lines. Otherwise, print
all basic-block execution counts exactly once on the line
that starts the basic-block. */
diff --git a/gprof/cg_arcs.c b/gprof/cg_arcs.c
index c51137d..fefe4b8 100644
--- a/gprof/cg_arcs.c
+++ b/gprof/cg_arcs.c
@@ -660,7 +660,7 @@ cg_assemble (void)
fractions. */
propagate_flags (top_sorted_syms);
- /* Starting from the topological bottom, propogate children times
+ /* Starting from the topological bottom, propagate children times
up to parents. */
cycle_time ();
for (sym_index = 0; sym_index < symtab.len; ++sym_index)
diff --git a/gprof/cg_print.c b/gprof/cg_print.c
index 77a0c4c..e01bdcb 100644
--- a/gprof/cg_print.c
+++ b/gprof/cg_print.c
@@ -847,7 +847,7 @@ cg_print_function_ordering (void)
tmp_arcs_count += arcs[arc_index]->count;
/* Count how many times each parent and child are used up
- to our threshhold of arcs (90%). */
+ to our threshold of arcs (90%). */
if ((double)tmp_arcs_count / (double)total_arcs > 0.90)
break;
diff --git a/gprof/corefile.c b/gprof/corefile.c
index 87de7bc..c9ec490 100644
--- a/gprof/corefile.c
+++ b/gprof/corefile.c
@@ -847,7 +847,7 @@ core_create_line_syms (void)
The old way called symtab_finalize before the is_static pass,
causing a problem since symtab_finalize uses is_static as part of
its address conflict resolution algorithm. Since global symbols
- were prefered over static symbols, and all line symbols were
+ were preferred over static symbols, and all line symbols were
global at that point, static function names that conflicted with
their own line numbers (static, but labeled as global) were
rejected in favor of the line num.
diff --git a/include/ansidecl.h b/include/ansidecl.h
index 0c71685..1b35752 100644
--- a/include/ansidecl.h
+++ b/include/ansidecl.h
@@ -1,4 +1,4 @@
-/* ANSI and traditional C compatability macros
+/* ANSI and traditional C compatibility macros
Copyright (C) 1991-2016 Free Software Foundation, Inc.
This file is part of the GNU C Library.
diff --git a/include/aout/aout64.h b/include/aout/aout64.h
index 2aed5bd..4d93124 100644
--- a/include/aout/aout64.h
+++ b/include/aout/aout64.h
@@ -492,7 +492,7 @@ enum reloc_type
RELOC_DISP14, /* data[0:13] = addend - pc + sv */
/* Q .
What are the other ones,
- Since this is a clean slate, can we throw away the ones we dont
+ Since this is a clean slate, can we throw away the ones we don't
understand ? Should we sort the values ? What about using a
microcode format like the 68k ? */
NO_RELOC
diff --git a/include/aout/encap.h b/include/aout/encap.h
index 4962875..10afdbc 100644
--- a/include/aout/encap.h
+++ b/include/aout/encap.h
@@ -30,7 +30,7 @@
* A normal bsd header (struct exec) is placed after the coff headers,
* and before the real text. I defined a the new fields 'a_machtype'
* and a_flags. If a_machtype is M_386, and a_flags & A_ENCAP is
- * true, then the bsd header is preceeded by a coff header. Macros
+ * true, then the bsd header is preceded by a coff header. Macros
* like N_TXTOFF and N_TXTADDR use this field to find the bsd header.
*
* The only problem is to track down the bsd exec header. The
diff --git a/include/aout/ranlib.h b/include/aout/ranlib.h
index 8aab973..c1b20b6 100644
--- a/include/aout/ranlib.h
+++ b/include/aout/ranlib.h
@@ -54,7 +54,7 @@ struct symdef
unsigned long file_offset;
};
-/* Compatability with BSD code */
+/* Compatibility with BSD code */
#define ranlib symdef
#define ran_un s
diff --git a/include/coff/internal.h b/include/coff/internal.h
index 885ac16..fe0f3f6 100644
--- a/include/coff/internal.h
+++ b/include/coff/internal.h
@@ -67,7 +67,7 @@ struct internal_filehdr
/* coff-stgo32 EXE stub header before BFD tdata has been allocated.
Its data is kept in INTERNAL_FILEHDR.GO32STUB afterwards.
- F_GO32STUB is set iff go32stub contains a valid data. Artifical headers
+ F_GO32STUB is set iff go32stub contains a valid data. Artificial headers
created in BFD have no pre-set go32stub. */
char go32stub[GO32_STUBSIZE];
@@ -390,7 +390,7 @@ struct internal_aouthdr
#define C_THUMBEXTFUNC (C_THUMBEXT + 20) /* 150 */
#define C_THUMBSTATFUNC (C_THUMBSTAT + 20) /* 151 */
-/* True if XCOFF symbols of class CLASS have auxillary csect information. */
+/* True if XCOFF symbols of class CLASS have auxiliary csect information. */
#define CSECT_SYM_P(CLASS) \
((CLASS) == C_EXT || (CLASS) == C_AIX_WEAKEXT || (CLASS) == C_HIDEXT)
diff --git a/include/coff/sym.h b/include/coff/sym.h
index 76204af..8441401 100644
--- a/include/coff/sym.h
+++ b/include/coff/sym.h
@@ -76,8 +76,8 @@ typedef struct {
bfd_vma cbSymOffset; /* offset to start of local symbols*/
long ioptMax; /* max index into optimization symbol entries */
bfd_vma cbOptOffset; /* offset to optimization symbol entries */
- long iauxMax; /* number of auxillary symbol entries */
- bfd_vma cbAuxOffset; /* offset to start of auxillary symbol entries*/
+ long iauxMax; /* number of auxiliary symbol entries */
+ bfd_vma cbAuxOffset; /* offset to start of auxiliary symbol entries*/
long issMax; /* max index into local strings */
bfd_vma cbSsOffset; /* offset to start of local strings */
long issExtMax; /* max index into external strings */
@@ -315,7 +315,7 @@ typedef struct {
/*
- * Auxillary information occurs only if needed.
+ * Auxiliary information occurs only if needed.
* It ALWAYS occurs in this order when present.
isymMac used by stProc only
@@ -369,7 +369,7 @@ typedef struct {
unsigned ot: 8; /* optimization type */
unsigned value: 24; /* address where we are moving it to */
RNDXR rndx; /* points to a symbol or opt entry */
- unsigned long offset; /* relative offset this occured */
+ unsigned long offset; /* relative offset this occurred */
} OPTR, *pOPTR;
#define optNil ((pOPTR) 0)
#define cbOPTR sizeof(OPTR)
@@ -419,10 +419,10 @@ typedef long FIT, *pFIT;
/* Dense numbers
*
* Rather than use file index, symbol index pairs to represent symbols
- * and globals, we use dense number so that they can be easily embeded
+ * and globals, we use dense number so that they can be easily embedded
* in intermediate code and the programs that process them can
* use direct access tabls instead of hash table (which would be
- * necesary otherwise because of the sparse name space caused by
+ * necessary otherwise because of the sparse name space caused by
* file index, symbol index pairs. Dense number are represented
* by RNDXRs.
*/
diff --git a/include/coff/xcoff.h b/include/coff/xcoff.h
index 4dde058..9f4bead 100644
--- a/include/coff/xcoff.h
+++ b/include/coff/xcoff.h
@@ -68,7 +68,7 @@
#define STYP_LOADER 0x1000
/* Specifies an exception section. A section of this type provides
- information to identify the reason that a trap or ececptin occured within
+ information to identify the reason that a trap or exception occurred within
and executable object program */
#define STYP_EXCEPT 0x0100
@@ -137,7 +137,7 @@
/* Dwarf symbol. */
#define C_DWARF 112
-/* Auxillary Symbol Entries */
+/* Auxiliary Symbol Entries */
/* x_smtyp values: */
#define SMTYP_ALIGN(x) ((x) >> 3) /* log2 of alignment */
diff --git a/include/elf/common.h b/include/elf/common.h
index da79613..8b52d4d 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -357,19 +357,19 @@
/* Old, unofficial value for National Semiconductor CompactRISC - CR16 */
#define EM_CR16_OLD 115
-/* AVR magic number. Written in the absense of an ABI. */
+/* AVR magic number. Written in the absence of an ABI. */
#define EM_AVR_OLD 0x1057
-/* MSP430 magic number. Written in the absense of everything. */
+/* MSP430 magic number. Written in the absence of everything. */
#define EM_MSP430_OLD 0x1059
-/* Morpho MT. Written in the absense of an ABI. */
+/* Morpho MT. Written in the absence of an ABI. */
#define EM_MT 0x2530
/* FR30 magic number - no EABI available. */
#define EM_CYGNUS_FR30 0x3330
-/* DLX magic number. Written in the absense of an ABI. */
+/* DLX magic number. Written in the absence of an ABI. */
#define EM_DLX 0x5aa5
/* FRV magic number - no EABI available??. */
@@ -384,7 +384,7 @@
/* D30V backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_D30V 0x7676
-/* Ubicom IP2xxx; Written in the absense of an ABI. */
+/* Ubicom IP2xxx; Written in the absence of an ABI. */
#define EM_IP2K_OLD 0x8217
/* Cygnus PowerPC ELF backend. Written in the absence of an ABI. */
@@ -396,7 +396,7 @@
/* Cygnus M32R ELF backend. Written in the absence of an ABI. */
#define EM_CYGNUS_M32R 0x9041
-/* V850 backend magic number. Written in the absense of an ABI. */
+/* V850 backend magic number. Written in the absence of an ABI. */
#define EM_CYGNUS_V850 0x9080
/* old S/390 backend magic number. Written in the absence of an ABI. */
@@ -408,7 +408,7 @@
#define EM_XSTORMY16 0xad45
/* mn10200 and mn10300 backend magic numbers.
- Written in the absense of an ABI. */
+ Written in the absence of an ABI. */
#define EM_CYGNUS_MN10300 0xbeef
#define EM_CYGNUS_MN10200 0xdead
@@ -494,7 +494,7 @@
#define SHT_FINI_ARRAY 15 /* Array of ptrs to finish functions */
#define SHT_PREINIT_ARRAY 16 /* Array of ptrs to pre-init funcs */
#define SHT_GROUP 17 /* Section contains a section group */
-#define SHT_SYMTAB_SHNDX 18 /* Indicies for SHN_XINDEX entries */
+#define SHT_SYMTAB_SHNDX 18 /* Indices for SHN_XINDEX entries */
#define SHT_LOOS 0x60000000 /* First of OS specific semantics */
#define SHT_HIOS 0x6fffffff /* Last of OS specific semantics */
@@ -816,7 +816,7 @@
DT_VALRNGHI) and virtual address range (DT_ADDRRNGLO to DT_ADDRRNGHI),
are used on Solaris. We support them everywhere. Note these values
lie outside of the (new) range for OS specific values. This is a
- deliberate special case and we maintain it for backwards compatability.
+ deliberate special case and we maintain it for backwards compatibility.
*/
#define DT_VALRNGLO 0x6ffffd00
#define DT_GNU_PRELINKED 0x6ffffdf5
diff --git a/include/elf/ia64.h b/include/elf/ia64.h
index 6b410a3..edc294c 100644
--- a/include/elf/ia64.h
+++ b/include/elf/ia64.h
@@ -102,7 +102,7 @@
/* The section contains the dwarf-3 string table. */
#define SHT_IA_64_VMS_DEBUG_STR 0x60000003
/* The section contains linkage information to perform consistency checking
- accross object modules. */
+ across object modules. */
#define SHT_IA_64_VMS_LINKAGES 0x60000004
/* The section allows the symbol vector in an image to be location through
the section table. */
diff --git a/include/elf/metag.h b/include/elf/metag.h
index 8787f7f..7bc4d0e 100644
--- a/include/elf/metag.h
+++ b/include/elf/metag.h
@@ -33,7 +33,7 @@ START_RELOC_NUMBERS (elf_metag_reloc_type)
RELOC_NUMBER (R_METAG_RELBRANCH, 4)
RELOC_NUMBER (R_METAG_GETSETOFF, 5)
- /* Backward compatability */
+ /* Backward compatibility */
RELOC_NUMBER (R_METAG_REG32OP1, 6)
RELOC_NUMBER (R_METAG_REG32OP2, 7)
RELOC_NUMBER (R_METAG_REG32OP3, 8)
diff --git a/include/elf/nds32.h b/include/elf/nds32.h
index 7279ca0..02d862e 100644
--- a/include/elf/nds32.h
+++ b/include/elf/nds32.h
@@ -242,7 +242,7 @@ END_RELOC_NUMBERS (R_NDS32_max)
#define E_NDS32_HAS_SATURATION_INST 0x00020000 /* v3, ELF 1.4. */
/* Encription instructions. */
#define E_NDS32_HAS_ENCRIPT_INST 0x00040000
-/* Doulbe Precision Floating point processor instructions. */
+/* Double Precision Floating point processor instructions. */
#define E_NDS32_HAS_FPU_DP_INST 0x00080000
/* No MAC instruction used. */
#define E_NDS32_HAS_NO_MAC_INST 0x00100000 /* Reclaimed when V2/V3. */
diff --git a/include/gdb/callback.h b/include/gdb/callback.h
index 9459129..b036e4f 100644
--- a/include/gdb/callback.h
+++ b/include/gdb/callback.h
@@ -103,7 +103,7 @@ struct host_callback_struct
non-empty. */
void (*pipe_nonempty) (host_callback *, int read_fd, int write_fd);
- /* When present, call to the client to give it the oportunity to
+ /* When present, call to the client to give it the opportunity to
poll any io devices for a request to quit (indicated by a nonzero
return value). */
int (*poll_quit) (host_callback *);
diff --git a/include/gdb/remote-sim.h b/include/gdb/remote-sim.h
index fc12898..addf400 100644
--- a/include/gdb/remote-sim.h
+++ b/include/gdb/remote-sim.h
@@ -108,7 +108,7 @@ SIM_DESC sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *callback,
struct bfd *abfd, char * const *argv);
-/* Destory a simulator instance.
+/* Destroy a simulator instance.
QUITTING is non-zero if we cannot hang on errors.
@@ -139,7 +139,7 @@ void sim_close (SIM_DESC sd, int quitting);
FIXME: For some hardware targets, before a loaded program can be
executed, it requires the manipulation of VM registers and tables.
- Such manipulation should probably (?) occure in
+ Such manipulation should probably (?) occur in
sim_create_inferior. */
SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty);
@@ -153,7 +153,7 @@ SIM_RC sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty);
Hardware simulator: This function shall initialize the processor
registers to a known value. The program counter and possibly stack
pointer shall be set using information obtained from ABFD (or
- hardware reset defaults). ARGV and ENV, dependant on the target
+ hardware reset defaults). ARGV and ENV, dependent on the target
ABI, may be written to memory.
Process simulator: After a call to this function, a new process
@@ -186,7 +186,7 @@ int sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length);
Legacy implementations ignore LENGTH and always return -1.
- If LENGTH does not match the size of REGNO no data is transfered
+ If LENGTH does not match the size of REGNO no data is transferred
(the actual register size is still returned). */
int sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length);
@@ -228,7 +228,7 @@ void sim_info (SIM_DESC sd, int verbose);
indicated by that signal. If a value of zero is passed in then the
simulation will continue as if there were no outstanding signal.
The effect of any other SIGGNAL value is is implementation
- dependant.
+ dependent.
Process simulator: If SIGRC is non-zero then the corresponding
signal is delivered to the simulated program and execution is then
@@ -248,7 +248,7 @@ int sim_stop (SIM_DESC sd);
/* Fetch the REASON why the program stopped.
SIM_EXITED: The program has terminated. SIGRC indicates the target
- dependant exit status.
+ dependent exit status.
SIM_STOPPED: The program has stopped. SIGRC uses the host's signal
numbering as a way of identifying the reaon: program interrupted by
@@ -258,7 +258,7 @@ int sim_stop (SIM_DESC sd);
undefined memory region (SIGSEGV); Mis-aligned memory access
(SIGBUS). For some signals information in addition to the signal
number may be retained by the simulator (e.g. offending address),
- that information is not directly accessable via this interface.
+ that information is not directly accessible via this interface.
SIM_SIGNALLED: The program has been terminated by a signal. The
simulator has encountered target code that causes the the program
diff --git a/include/mach-o/arm.h b/include/mach-o/arm.h
index 39f9214..26f2930 100644
--- a/include/mach-o/arm.h
+++ b/include/mach-o/arm.h
@@ -24,7 +24,7 @@
/* ARM relocations. */
#define BFD_MACH_O_ARM_RELOC_VANILLA 0 /* Generic relocation. */
#define BFD_MACH_O_ARM_RELOC_PAIR 1 /* Second entry in a pair. */
-#define BFD_MACH_O_ARM_RELOC_SECTDIFF 2 /* Substract with a PAIR. */
+#define BFD_MACH_O_ARM_RELOC_SECTDIFF 2 /* Subtract with a PAIR. */
#define BFD_MACH_O_ARM_RELOC_LOCAL_SECTDIFF 3 /* Like above, but local ref. */
#define BFD_MACH_O_ARM_RELOC_PB_LA_PTR 4 /* Prebound lazy pointer. */
#define BFD_MACH_O_ARM_RELOC_BR24 5 /* 24bit branch. */
diff --git a/include/opcode/alpha.h b/include/opcode/alpha.h
index 747660e..a0cee82 100644
--- a/include/opcode/alpha.h
+++ b/include/opcode/alpha.h
@@ -158,7 +158,7 @@ extern const unsigned alpha_num_operands;
instructions which want their operands to look like "Ra,disp(Rb)". */
#define AXP_OPERAND_PARENS 02
-/* Used in combination with PARENS, this supresses the supression of
+/* Used in combination with PARENS, this suppresses the supression of
the comma. This is used for "jmp Ra,(Rb),hint". */
#define AXP_OPERAND_COMMA 04
@@ -179,7 +179,7 @@ extern const unsigned alpha_num_operands;
a flags value of 0 can be treated as end-of-arguments. */
#define AXP_OPERAND_UNSIGNED 0200
-/* Supress overflow detection on this field. This is used for hints. */
+/* Suppress overflow detection on this field. This is used for hints. */
#define AXP_OPERAND_NOOVERFLOW 0400
/* Mask for optional argument default value. */
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 2214b2f..954746a 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -317,7 +317,7 @@ extern const unsigned arc_NToperand;
/* Don't check the range when matching. */
#define ARC_OPERAND_NCHK 0x0800
-/* Mark the braket possition. */
+/* Mark the braket position. */
#define ARC_OPERAND_BRAKET 0x1000
/* Address type operand for NPS400. */
diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
index 2dcc8bc..6d686da 100644
--- a/include/opcode/hppa.h
+++ b/include/opcode/hppa.h
@@ -30,7 +30,7 @@
*/
/* There are two kinds of delay slot nullification: normal which is
- * controled by the nullification bit, and conditional, which depends
+ * controlled by the nullification bit, and conditional, which depends
* on the direction of the branch and its success or failure.
*
* NONE is unfortunately #defined in the hiux system include files.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 66d2ceb..921c5b5 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -405,7 +405,7 @@ extern const unsigned int num_powerpc_operands;
/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
is omitted, then the value it should use for the operand is stored
- in the SHIFT field of the immediatly following operand field. */
+ in the SHIFT field of the immediately following operand field. */
#define PPC_OPERAND_OPTIONAL_VALUE (0x400000)
/* This flag is only used with PPC_OPERAND_OPTIONAL. The operand is
diff --git a/include/opcode/tic4x.h b/include/opcode/tic4x.h
index b4209a1..1287699 100644
--- a/include/opcode/tic4x.h
+++ b/include/opcode/tic4x.h
@@ -519,7 +519,7 @@ typedef struct tic4x_inst tic4x_inst_t;
Instr: 1/1 - CALLc, C4X: LAJc
*/
-/* LL: Load-load parallell operation
+/* LL: Load-load parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Indirect 0,1,IR0,IR1 (J)
dst1 = Register 0-7 (K)
@@ -533,7 +533,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ name "2_" name "1", opcode, 0xfe000000, "i;L|J,K", level }, \
{ name "1_" name "2", opcode, 0xfe000000, "J,K|i;L", level }
-/* LS: Store-store parallell operation
+/* LS: Store-store parallel operation
Syntax: <i> src2, dst2 || <i> src1, dst1
src1 = Register 0-7 (H)
dst1 = Indirect 0,1,IR0,IR1 (J)
@@ -613,7 +613,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ nameb "3_" namea "3", opcode|0x03000000, 0xff000000, "i;H;M|j;K;N", level }, \
{ nameb "3_" namea "3", opcode|0x03000000, 0xff000000, "i;H;M|K;j;N", level }
-/* P: General 2-operand operation with parallell store
+/* P: General 2-operand operation with parallel store
Syntax: <ia> src2, dst1 || <ib> src3, dst2
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
dst1 = Register 0-7 (L)
@@ -628,7 +628,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ namea "_" nameb, opcode, 0xfe000000, "i;L|H,J", level }, \
{ nameb "_" namea, opcode, 0xfe000000, "H,J|i;L", level }
-/* Q: General 3-operand operation with parallell store
+/* Q: General 3-operand operation with parallel store
Syntax: <ia> src1, src2, dst1 || <ib> src3, dst2
src1 = Register 0-7 (K)
src2 = Indirect 0,1,IR0,IR1, ENH: register (i)
@@ -644,7 +644,7 @@ typedef struct tic4x_inst tic4x_inst_t;
{ namea "3_" nameb , opcode, 0xfe000000, "K,i;L|H,J", level }, \
{ nameb "_" namea "3", opcode, 0xfe000000, "H,J|K,i;L", level }
-/* QC: General commutative 3-operand operation with parallell store
+/* QC: General commutative 3-operand operation with parallel store
Syntax: <ia> src2, src1, dst1 || <ib> src3, dst2
<ia> src1, src2, dst1 || <ib> src3, dst2 - Manual
src1 = Register 0-7 (K)
diff --git a/include/opcode/tic6x-insn-formats.h b/include/opcode/tic6x-insn-formats.h
index f93142f..9db8e0a 100644
--- a/include/opcode/tic6x-insn-formats.h
+++ b/include/opcode/tic6x-insn-formats.h
@@ -552,7 +552,7 @@ FMT(nfu_uspl, 16, 0x0c66, 0xbc7e,
/* make up some fields to pretend to have s and z fields s for this format
so as to fit in other predicated compact instruction to avoid special-
casing this instruction in tic6x-dis.c
- use op field as a predicate adress register selector (s field)
+ use op field as a predicate address register selector (s field)
use the first zeroed bit as a z value as this insn only supports [a0]
and [b0] predicate forms.
*/
diff --git a/include/opcode/tic80.h b/include/opcode/tic80.h
index 510da05..a8b13b3 100644
--- a/include/opcode/tic80.h
+++ b/include/opcode/tic80.h
@@ -169,7 +169,7 @@ extern const struct tic80_operand tic80_operands[];
#define TIC80_OPERAND_PCREL (1 << 5)
-/* This flag is a hint to the disassembler for using hex as the prefered
+/* This flag is a hint to the disassembler for using hex as the preferred
printing format, even for small positive or negative immediate values.
Normally values in the range -999 to 999 are printed as signed decimal
values and other values are printed in hex. */
diff --git a/include/safe-ctype.h b/include/safe-ctype.h
index a1118be..5aaf0f3 100644
--- a/include/safe-ctype.h
+++ b/include/safe-ctype.h
@@ -112,7 +112,7 @@ extern const unsigned char _sch_tolower[256];
#define TOUPPER(c) _sch_toupper[(c) & 0xff]
#define TOLOWER(c) _sch_tolower[(c) & 0xff]
-/* Prevent the users of safe-ctype.h from accidently using the routines
+/* Prevent the users of safe-ctype.h from accidentally using the routines
from ctype.h. Initially, the approach was to produce an error when
detecting that ctype.h has been included. But this was causing
trouble as ctype.h might get indirectly included as a result of
diff --git a/include/splay-tree.h b/include/splay-tree.h
index 0eef3fa..6cf639b 100644
--- a/include/splay-tree.h
+++ b/include/splay-tree.h
@@ -98,7 +98,7 @@ struct splay_tree_s {
/* The root of the tree. */
splay_tree_node root;
- /* The comparision function. */
+ /* The comparison function. */
splay_tree_compare_fn comp;
/* The deallocate-key function. NULL if no cleanup is necessary. */
diff --git a/intl/dcigettext.c b/intl/dcigettext.c
index a8d4a14..2baa3e5 100644
--- a/intl/dcigettext.c
+++ b/intl/dcigettext.c
@@ -320,7 +320,7 @@ static const char *category_to_name PARAMS ((int category)) internal_function;
#endif
-/* For those loosing systems which don't have `alloca' we have to add
+/* For those losing systems which don't have `alloca' we have to add
some additional code emulating it. */
#ifdef HAVE_ALLOCA
/* Nothing has to be done. */
diff --git a/intl/plural.c b/intl/plural.c
index 951303a..9542443 100644
--- a/intl/plural.c
+++ b/intl/plural.c
@@ -717,7 +717,7 @@ yyparse (YYPARSE_PARAM_ARG)
`yyvs': related to semantic values,
`yyls': related to locations.
- Refer to the stacks thru separate pointers, to allow yyoverflow
+ Refer to the stacks through separate pointers, to allow yyoverflow
to reallocate them elsewhere. */
/* The state stack. */
diff --git a/ld/deffile.h b/ld/deffile.h
index 26e0431..e6d98eb 100644
--- a/ld/deffile.h
+++ b/ld/deffile.h
@@ -34,7 +34,7 @@ typedef struct def_file_section {
typedef struct def_file_export {
char *name; /* always set */
char *internal_name; /* always set, may == name */
- char *its_name; /* optional export table name refered to. */
+ char *its_name; /* optional export table name referred to. */
int ordinal; /* -1 if not specified */
int hint;
char flag_private, flag_constant, flag_noname, flag_data, flag_forward;
@@ -50,7 +50,7 @@ typedef struct def_file_import {
char *internal_name; /* always set */
def_file_module *module; /* always set */
char *name; /* may be NULL; either this or ordinal will be set */
- char *its_name; /* optional import table name refered to. */
+ char *its_name; /* optional import table name referred to. */
int ordinal; /* may be -1 */
int data; /* = 1 if data */
} def_file_import;
diff --git a/ld/ld.h b/ld/ld.h
index 410ee99..95d5a15 100644
--- a/ld/ld.h
+++ b/ld/ld.h
@@ -185,7 +185,7 @@ typedef struct
/* Name of runtime interpreter to invoke. */
char *interpreter;
- /* Name to give runtime libary from the -soname argument. */
+ /* Name to give runtime library from the -soname argument. */
char *soname;
/* Runtime library search path from the -rpath argument. */
diff --git a/ld/ldlang.c b/ld/ldlang.c
index 7d495c0..de24380 100644
--- a/ld/ldlang.c
+++ b/ld/ldlang.c
@@ -3704,7 +3704,7 @@ map_input_to_output_sections
processed the segment marker. Originally, the linker
treated segment directives (like -Ttext on the
command-line) as section directives. We honor the
- section directive semantics for backwards compatibilty;
+ section directive semantics for backwards compatibility;
linker scripts that do not specifically check for
SEGMENT_START automatically get the old semantics. */
if (!s->address_statement.segment
@@ -6880,7 +6880,7 @@ lang_process (void)
are any more to be added to the link before we call the
emulation's after_open hook. We create a private list of
input statements for this purpose, which we will eventually
- insert into the global statment list after the first claimed
+ insert into the global statement list after the first claimed
file. */
added = *stat_ptr;
/* We need to manipulate all three chains in synchrony. */
diff --git a/ld/ldmisc.c b/ld/ldmisc.c
index 5efff74..1cea4a7 100644
--- a/ld/ldmisc.c
+++ b/ld/ldmisc.c
@@ -425,7 +425,7 @@ vfinfo (FILE *fp, const char *fmt, va_list arg, bfd_boolean is_warning)
++fmt;
break;
}
- /* Fall thru */
+ /* Fall through */
default:
fprintf (fp, "%%%c", fmt[-1]);
diff --git a/ld/pe-dll.c b/ld/pe-dll.c
index 1f176ec..055a6cf 100644
--- a/ld/pe-dll.c
+++ b/ld/pe-dll.c
@@ -128,7 +128,7 @@
should run in parallel with addresses vector (FirstThunk), i.e. that they
should have same number of elements and terminated with zero. We violate
this, since FirstThunk points directly into machine code. But in practice,
- OS loader implemented the sane way: it goes thru OriginalFirstThunk and
+ OS loader implemented the sane way: it goes through OriginalFirstThunk and
puts addresses to FirstThunk, not something else. It once again should be
noted that dll and symbol name structures are reused across fixup entries
and should be there anyway to support standard import stuff, so sustained
diff --git a/libdecnumber/decBasic.c b/libdecnumber/decBasic.c
index 6fbf48e..5a56595 100644
--- a/libdecnumber/decBasic.c
+++ b/libdecnumber/decBasic.c
@@ -3091,7 +3091,7 @@ decFloat * decFloatQuantize(decFloat *result,
ulsd=BUFOFF+DECPMAX-1;
}
else { /* padding will fit (but may still be too long) */
- /* final-word mask depends on endianess */
+ /* final-word mask depends on endianness */
#if DECLITEND
static const uInt dmask[]={0, 0x000000ff, 0x0000ffff, 0x00ffffff};
#else
diff --git a/libiberty/bcopy.c b/libiberty/bcopy.c
index f9b7a8a..914b698 100644
--- a/libiberty/bcopy.c
+++ b/libiberty/bcopy.c
@@ -1,4 +1,4 @@
-/* bcopy -- copy memory regions of arbitary length
+/* bcopy -- copy memory regions of arbitrary length
@deftypefn Supplemental void bcopy (char *@var{in}, char *@var{out}, int @var{length})
diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c
index 45663fe..b282986 100644
--- a/libiberty/cp-demangle.c
+++ b/libiberty/cp-demangle.c
@@ -83,7 +83,7 @@
IN_GLIBCPP_V3
If defined, this file defines only __cxa_demangle() and
- __gcclibcxx_demangle_callback(), and no other publically visible
+ __gcclibcxx_demangle_callback(), and no other publicly visible
functions or variables.
STANDALONE_DEMANGLER
diff --git a/libiberty/cplus-dem.c b/libiberty/cplus-dem.c
index 0386da5..e8b8b9f 100644
--- a/libiberty/cplus-dem.c
+++ b/libiberty/cplus-dem.c
@@ -965,7 +965,7 @@ ada_demangle (const char *mangled, int option ATTRIBUTE_UNUSED)
goto unknown;
/* Most of the demangling will trivially remove chars. Operator names
- may add one char but because they are always preceeded by '__' which is
+ may add one char but because they are always preceded by '__' which is
replaced by '.', they eventually never expand the size.
A few special names such as '___elabs' add a few chars (at most 7), but
they occur only once. */
@@ -2738,7 +2738,7 @@ iterate_demangle_function (struct work_stuff *work, const char **mangled,
/* Iterate over occurrences of __, allowing names and types to have a
"__" sequence in them. We must start with the first (not the last)
occurrence, since "__" most often occur between independent mangled
- parts, hence starting at the last occurence inside a signature
+ parts, hence starting at the last occurrence inside a signature
might get us a "successful" demangling of the signature. */
while (scan[2])
diff --git a/libiberty/make-relative-prefix.c b/libiberty/make-relative-prefix.c
index fa81399..fedd865 100644
--- a/libiberty/make-relative-prefix.c
+++ b/libiberty/make-relative-prefix.c
@@ -408,7 +408,7 @@ make_relative_prefix_1 (const char *progname, const char *bin_prefix,
/* Do the full job, including symlink resolution.
This path will find files installed in the same place as the
program even when a soft link has been made to the program
- from somwhere else. */
+ from somewhere else. */
char *
make_relative_prefix (const char *progname, const char *bin_prefix,
diff --git a/libiberty/pex-win32.c b/libiberty/pex-win32.c
index 4c15b0d..9f0d771 100644
--- a/libiberty/pex-win32.c
+++ b/libiberty/pex-win32.c
@@ -350,7 +350,7 @@ argv_to_cmdline (char *const *argv)
/* We only quote arguments that contain spaces, \t or " characters to
prevent wasting 2 chars per argument of the CreateProcess 32k char
limit. We need only escape embedded double-quotes and immediately
- preceeding backslash characters. A sequence of backslach characters
+ preceding backslash characters. A sequence of backslach characters
that is not follwed by a double quote character will not be
escaped. */
needs_quotes = 0;
@@ -363,7 +363,7 @@ argv_to_cmdline (char *const *argv)
if (argv[i][j] == '"')
{
- /* Escape preceeding backslashes. */
+ /* Escape preceding backslashes. */
for (k = j - 1; k >= 0 && argv[i][k] == '\\'; k--)
cmdline_len++;
/* Escape the qote character. */
diff --git a/libiberty/random.c b/libiberty/random.c
index b1d3c6c..f21b8bb 100644
--- a/libiberty/random.c
+++ b/libiberty/random.c
@@ -364,7 +364,7 @@ setstate (PTR arg_state)
/* If we are using the trivial TYPE_0 R.N.G., just do the old linear
congruential bit. Otherwise, we do our fancy trinomial stuff, which is the
- same in all ther other cases due to all the global variables that have been
+ same in all the other cases due to all the global variables that have been
set up. The basic operation is to add the number at the rear pointer into
the one at the front pointer. Then both pointers are advanced to the next
location cyclically in the table. The value returned is the sum generated,
diff --git a/libiberty/regex.c b/libiberty/regex.c
index 6854e3b..8e0efb5 100644
--- a/libiberty/regex.c
+++ b/libiberty/regex.c
@@ -4386,7 +4386,7 @@ wcs_compile_range (CHAR_T range_start_char, const CHAR_T **p_ptr,
{
/* range_start is a collating symbol. */
int32_t *wextra;
- /* Retreive the index and get collation sequence value. */
+ /* Retrieve the index and get collation sequence value. */
wextra = (int32_t*)(extra + char_set[-range_start_char]);
start_val = wextra[1 + *wextra];
}
diff --git a/libiberty/simple-object-mach-o.c b/libiberty/simple-object-mach-o.c
index d1b676d..f46d702 100644
--- a/libiberty/simple-object-mach-o.c
+++ b/libiberty/simple-object-mach-o.c
@@ -1218,7 +1218,7 @@ simple_object_mach_o_write_segment (simple_object_write *sobj, int descriptor,
errmsg, err))
return 0;
- /* Subtract the wrapper section start from the begining of each sub
+ /* Subtract the wrapper section start from the beginning of each sub
section. */
for (i = 1; i < nsects_in; ++i)
diff --git a/libiberty/strsignal.c b/libiberty/strsignal.c
index 666b1b4..7f71152 100644
--- a/libiberty/strsignal.c
+++ b/libiberty/strsignal.c
@@ -152,7 +152,7 @@ static const struct signal_info signal_table[] =
#endif
#if defined (SIGIO)
/* "I/O pending" has also been suggested, but is misleading since the
- signal only happens when the process has asked for it, not everytime
+ signal only happens when the process has asked for it, not every time
I/O is pending. */
ENTRY(SIGIO, "SIGIO", "I/O possible"),
#endif
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index cfe6630..9f31e35 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -29,7 +29,7 @@
these fields where the VALUE will be inserted into CODE. MASK can be zero or
the base mask of the opcode.
- N.B. the fields are required to be in such an order than the least signficant
+ N.B. the fields are required to be in such an order than the least significant
field for VALUE comes the first, e.g. the <index> in
SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
is encoded in H:L:M in some cases, the fields H:L:M should be passed in
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index bcf5232..e445cf7 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -117,7 +117,7 @@ parse_aarch64_dis_options (const char *options)
these fields where the VALUE will be extracted from CODE and returned.
MASK can be zero or the base mask of the opcode.
- N.B. the fields are required to be in such an order than the most signficant
+ N.B. the fields are required to be in such an order than the most significant
field for VALUE comes the first, e.g. the <index> in
SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]
is encoded in H:L:M in some cases, the fields H:L:M should be passed in
@@ -3125,7 +3125,7 @@ print_insn_aarch64 (bfd_vma pc,
n = last_mapping_sym;
/* No mapping symbol found at this address. Look backwards
- for a preceeding one. */
+ for a preceding one. */
for (; n >= 0; n--)
{
if (get_sym_code_type (info, n, &type))
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 31b5a91..9abc65b 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -77,7 +77,7 @@ static int addrtypenames_max = ARC_NUM_ADDRTYPES - 1;
static const char * const addrtypeunknown = "unknown";
/* This structure keeps track which instruction class(es)
- should be ignored durring disassembling. */
+ should be ignored during disassembling. */
typedef struct skipclass
{
@@ -86,7 +86,7 @@ typedef struct skipclass
struct skipclass *nxt;
} skipclass_t, *linkclass;
-/* Intial classes of instructions to be consider first when
+/* Initial classes of instructions to be consider first when
disassembling. */
static linkclass decodelist = NULL;
@@ -399,7 +399,7 @@ find_format (bfd_vma memaddr,
if (opcode == NULL)
{
(*info->fprintf_func) (info->stream, "\
-An error occured while generating the extension instruction operations");
+An error occurred while generating the extension instruction operations");
*opcode_result = NULL;
return FALSE;
}
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 87d4930..79fad83 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -3342,7 +3342,7 @@ arm_decode_shift (long given, fprintf_ftype func, void *stream,
#define PRE_BIT_SET (given & (1 << P_BIT))
/* Print one coprocessor instruction on INFO->STREAM.
- Return TRUE if the instuction matched, FALSE if this is not a
+ Return TRUE if the instruction matched, FALSE if this is not a
recognised coprocessor instruction. */
static bfd_boolean
@@ -4083,7 +4083,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
}
/* Print one neon instruction on INFO->STREAM.
- Return TRUE if the instuction matched, FALSE if this is not a
+ Return TRUE if the instruction matched, FALSE if this is not a
recognised neon instruction. */
static bfd_boolean
@@ -6141,10 +6141,10 @@ parse_disassembler_options (char *options)
{
parse_arm_disassembler_option (options);
- /* Skip forward to next seperator. */
+ /* Skip forward to next separator. */
while ((*options) && (! ISSPACE (*options)) && (*options != ','))
++ options;
- /* Skip forward past seperators. */
+ /* Skip forward past separators. */
while (ISSPACE (*options) || (*options == ','))
++ options;
}
diff --git a/opcodes/cgen-asm.c b/opcodes/cgen-asm.c
index 73ac378..da58559 100644
--- a/opcodes/cgen-asm.c
+++ b/opcodes/cgen-asm.c
@@ -60,7 +60,7 @@ cgen_init_parse_operand (CGEN_CPU_DESC cd)
The result is a pointer to the next entry to use.
The table is scanned backwards as additions are made to the front of the
- list and we want earlier ones to be prefered. */
+ list and we want earlier ones to be preferred. */
static CGEN_INSN_LIST *
hash_insn_array (CGEN_CPU_DESC cd,
@@ -156,7 +156,7 @@ build_asm_hash_table (CGEN_CPU_DESC cd)
asm_hash_table, hash_entry_buf);
/* Add runtime added insns.
- Later added insns will be prefered over earlier ones. */
+ Later added insns will be preferred over earlier ones. */
hash_entry_buf = hash_insn_list (cd, insn_table->new_entries,
asm_hash_table, hash_entry_buf);
diff --git a/opcodes/cgen-dis.c b/opcodes/cgen-dis.c
index 2d0f701..d89c492 100644
--- a/opcodes/cgen-dis.c
+++ b/opcodes/cgen-dis.c
@@ -94,7 +94,7 @@ add_insn_to_hash_chain (CGEN_INSN_LIST *hentbuf,
The result is a pointer to the next entry to use.
The table is scanned backwards as additions are made to the front of the
- list and we want earlier ones to be prefered. */
+ list and we want earlier ones to be preferred. */
static CGEN_INSN_LIST *
hash_insn_array (CGEN_CPU_DESC cd,
@@ -210,7 +210,7 @@ build_dis_hash_table (CGEN_CPU_DESC cd)
dis_hash_table, hash_entry_buf);
/* Add runtime added insns.
- Later added insns will be prefered over earlier ones. */
+ Later added insns will be preferred over earlier ones. */
hash_entry_buf = hash_insn_list (cd, insn_table->new_entries,
dis_hash_table, hash_entry_buf);
diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c
index 543ce32..e8711d9 100644
--- a/opcodes/cgen-opc.c
+++ b/opcodes/cgen-opc.c
@@ -249,7 +249,7 @@ build_keyword_hash_tables (CGEN_KEYWORD *kt)
memset (kt->value_hash_table, 0, size * sizeof (CGEN_KEYWORD_ENTRY *));
/* The table is scanned backwards as we want keywords appearing earlier to
- be prefered over later ones. */
+ be preferred over later ones. */
for (i = kt->num_init_entries - 1; i >= 0; --i)
cgen_keyword_add (kt, &kt->init_entries[i]);
}
diff --git a/opcodes/dis-buf.c b/opcodes/dis-buf.c
index d46c772..76722a8 100644
--- a/opcodes/dis-buf.c
+++ b/opcodes/dis-buf.c
@@ -71,7 +71,7 @@ perror_memory (int status,
}
}
-/* This could be in a separate file, to save miniscule amounts of space
+/* This could be in a separate file, to save minuscule amounts of space
in statically linked executables. */
/* Just print the address is hex. This is included for completeness even
diff --git a/opcodes/epiphany-asm.c b/opcodes/epiphany-asm.c
index 41acc42..9ed5f6e 100644
--- a/opcodes/epiphany-asm.c
+++ b/opcodes/epiphany-asm.c
@@ -742,7 +742,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c
index 2838b06..89c2479 100644
--- a/opcodes/epiphany-dis.c
+++ b/opcodes/epiphany-dis.c
@@ -537,7 +537,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c
index 5c5871b..979c06c 100644
--- a/opcodes/fr30-asm.c
+++ b/opcodes/fr30-asm.c
@@ -597,7 +597,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index 77ddb50..9761a52 100644
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -558,7 +558,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c
index 05df62d..65c8664 100644
--- a/opcodes/frv-asm.c
+++ b/opcodes/frv-asm.c
@@ -1550,7 +1550,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c
index 663ce36..708e1e6 100644
--- a/opcodes/frv-dis.c
+++ b/opcodes/frv-dis.c
@@ -655,7 +655,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c
index 2aed2f6..3b4e513 100644
--- a/opcodes/frv-opc.c
+++ b/opcodes/frv-opc.c
@@ -441,7 +441,7 @@ match_vliw (VLIW_COMBO *vliw1, VLIW_COMBO *vliw2, int vliw_size)
return TRUE;
}
-/* Find the next vliw vliw in the table that can accomodate the new insn.
+/* Find the next vliw vliw in the table that can accommodate the new insn.
If one is found then return it. Otherwise return NULL. */
static VLIW_COMBO *
diff --git a/opcodes/hppa-dis.c b/opcodes/hppa-dis.c
index 6b3dcde..38e57a6 100644
--- a/opcodes/hppa-dis.c
+++ b/opcodes/hppa-dis.c
@@ -49,7 +49,7 @@ static const char *const fp_reg_names[] =
typedef unsigned int CORE_ADDR;
-/* Get at various relevent fields of an instruction word. */
+/* Get at various relevant fields of an instruction word. */
#define MASK_5 0x1f
#define MASK_10 0x3ff
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 5f49f91..1ebae7a 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -610,7 +610,7 @@ enum
/* Static rounding. */
evex_rounding_mode,
- /* Supress all exceptions. */
+ /* Suppress all exceptions. */
evex_sae_mode,
/* Mask register operand. */
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index ba04ce4..bd4d844 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -556,7 +556,7 @@ enum
/* Static rounding control is supported. */
StaticRounding,
- /* Supress All Exceptions is supported. */
+ /* Suppress All Exceptions is supported. */
SAE,
/* Copressed Disp8*N attribute. */
diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c
index 571f596..4396ea7 100644
--- a/opcodes/ip2k-asm.c
+++ b/opcodes/ip2k-asm.c
@@ -798,7 +798,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c
index 00b7150..5ed3e5f 100644
--- a/opcodes/ip2k-dis.c
+++ b/opcodes/ip2k-dis.c
@@ -547,7 +547,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c
index 9cd4a87..19d221f 100644
--- a/opcodes/iq2000-asm.c
+++ b/opcodes/iq2000-asm.c
@@ -746,7 +746,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c
index 540cdce..499a4ed 100644
--- a/opcodes/iq2000-dis.c
+++ b/opcodes/iq2000-dis.c
@@ -448,7 +448,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/lm32-asm.c b/opcodes/lm32-asm.c
index 416236c..765807b 100644
--- a/opcodes/lm32-asm.c
+++ b/opcodes/lm32-asm.c
@@ -636,7 +636,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c
index c25f412..d269efb 100644
--- a/opcodes/lm32-dis.c
+++ b/opcodes/lm32-dis.c
@@ -406,7 +406,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/m32c-asm.c b/opcodes/m32c-asm.c
index 61c6802..2a31e6a 100644
--- a/opcodes/m32c-asm.c
+++ b/opcodes/m32c-asm.c
@@ -1871,7 +1871,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c
index 37a5ad1..40b0828 100644
--- a/opcodes/m32c-dis.c
+++ b/opcodes/m32c-dis.c
@@ -1150,7 +1150,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c
index 78f905a..f7e9c9b 100644
--- a/opcodes/m32r-asm.c
+++ b/opcodes/m32r-asm.c
@@ -615,7 +615,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index 35057d5..ddfcd2a 100644
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -538,7 +538,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/m68hc11-opc.c b/opcodes/m68hc11-opc.c
index eee565a..6ca959f 100644
--- a/opcodes/m68hc11-opc.c
+++ b/opcodes/m68hc11-opc.c
@@ -1707,7 +1707,7 @@ const struct m68hc11_opcode m68hc11_opcodes[] = {
{ "sub", M68XG_OP_R_IMM16, 2, 0xc000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
{ "cmp", M68XG_OP_R_IMM16, 2, 0xd000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
{ "add", M68XG_OP_R_IMM16, 2, 0xe000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
- /* ld is for backwards compatability only, the correct opcode is ldw */
+ /* ld is for backwards compatibility only, the correct opcode is ldw */
{ "ld", M68XG_OP_R_IMM16, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 },
{ "ldw", M68XG_OP_R_IMM16, 2, 0xf000, 0, 0, 0, 0, 0, cpuxgate, 0x0000 }
};
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index 1e7c830..76d0a66 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -42,7 +42,7 @@ static char *const reg_names[] =
};
/* Name of register halves for MAC/EMAC.
- Seperate from reg_names since 'spu', 'fpl' look weird. */
+ Separate from reg_names since 'spu', 'fpl' look weird. */
static char *const reg_half_names[] =
{
"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index dc07f72..e678e62 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1517,7 +1517,7 @@ const struct m68k_opcode m68k_opcodes[] =
/* NOTE: The mcf5200 family programmer's reference manual does not
indicate the byte form of the movea instruction is invalid (as it
- is on 68000 family cpus). However, experiments on the 5202 yeild
+ is on 68000 family cpus). However, experiments on the 5202 yield
unexpected results. The value is copied, but it is not sign extended
(as is done with movea.w) and the top three bytes in the address
register are not disturbed. I don't know if this is the intended
diff --git a/opcodes/mep-asm.c b/opcodes/mep-asm.c
index 89116ee..0c1559a 100644
--- a/opcodes/mep-asm.c
+++ b/opcodes/mep-asm.c
@@ -1574,7 +1574,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c
index 14ddb2e..1c926d9 100644
--- a/opcodes/mep-dis.c
+++ b/opcodes/mep-dis.c
@@ -357,7 +357,7 @@ mep_examine_vliw32_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
cop1buflength = 2;
}
- /* Now we have the distrubution set. Print them out. */
+ /* Now we have the distribution set. Print them out. */
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
@@ -446,7 +446,7 @@ mep_examine_vliw64_insns (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
cop1buflength = 6;
}
- /* Now we have the distrubution set. Print them out. */
+ /* Now we have the distribution set. Print them out. */
status = mep_print_vliw_insns (cd, pc, info, buf, corebuflength,
cop1buflength, cop2buflength);
@@ -1446,7 +1446,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/metag-dis.c b/opcodes/metag-dis.c
index 1fdd43d..b6b3d14 100644
--- a/opcodes/metag-dis.c
+++ b/opcodes/metag-dis.c
@@ -2700,7 +2700,7 @@ print_dalu (unsigned int insn_word, bfd_vma pc ATTRIBUTE_UNUSED,
decode_template_definition (insn_word, buf + len,
OPERAND_WIDTH - len);
}
- else /* Not a template definiton. */
+ else /* Not a template definition. */
{
reg_nums[0] = ((insn_word >> 19) & REG_MASK);
reg_nums[1] = ((insn_word >> 14) & REG_MASK);
diff --git a/opcodes/msp430-decode.c b/opcodes/msp430-decode.c
index 137205f..758f3aa 100644
--- a/opcodes/msp430-decode.c
+++ b/opcodes/msp430-decode.c
@@ -347,7 +347,7 @@ msp430_decode_opcode (unsigned long pc,
post_extension_word:
;
- /* 430X extention word. */
+ /* 430X extension word. */
GETBYTE ();
switch (op[0] & 0xff)
{
diff --git a/opcodes/msp430-dis.c b/opcodes/msp430-dis.c
index c057c9b..ae0f4f7 100644
--- a/opcodes/msp430-dis.c
+++ b/opcodes/msp430-dis.c
@@ -136,7 +136,7 @@ msp430_nooperands (struct msp430_opcode_s *opcode,
}
else
{
- strcpy (comm, "return from interupt");
+ strcpy (comm, "return from interrupt");
*cycles = 5;
}
diff --git a/opcodes/mt-asm.c b/opcodes/mt-asm.c
index 87e9d6f..d40c11c 100644
--- a/opcodes/mt-asm.c
+++ b/opcodes/mt-asm.c
@@ -882,7 +882,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c
index e049d20..201b649 100644
--- a/opcodes/mt-dis.c
+++ b/opcodes/mt-dis.c
@@ -549,7 +549,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c
index b14d5d7..bc831bb 100644
--- a/opcodes/ns32k-dis.c
+++ b/opcodes/ns32k-dis.c
@@ -347,7 +347,7 @@ flip_bytes (char *ptr, int count)
((c) == 'F' || (c) == 'L' || (c) == 'B' \
|| (c) == 'W' || (c) == 'D' || (c) == 'A' || (c) == 'I' || (c) == 'Z')
-/* Adressing modes. */
+/* Addressing modes. */
#define Adrmod_index_byte 0x1c
#define Adrmod_index_word 0x1d
#define Adrmod_index_doubleword 0x1e
diff --git a/opcodes/opintl.h b/opcodes/opintl.h
index 3d811bd..8dad5b2 100644
--- a/opcodes/opintl.h
+++ b/opcodes/opintl.h
@@ -26,7 +26,7 @@
This is because the code in this directory is used to build a library which
will be linked with code in other directories to form programs. We want to
- maintain a seperate translation file for this directory however, rather
+ maintain a separate translation file for this directory however, rather
than being forced to merge it with that of any program linked to
libopcodes. This is a library, so it cannot depend on the catalog
currently loaded.
diff --git a/opcodes/or1k-asm.c b/opcodes/or1k-asm.c
index 91c8136..9902f09 100644
--- a/opcodes/or1k-asm.c
+++ b/opcodes/or1k-asm.c
@@ -790,7 +790,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
index 1ffc0f4..a0cb50b 100644
--- a/opcodes/or1k-desc.h
+++ b/opcodes/or1k-desc.h
@@ -73,7 +73,7 @@ typedef enum spr_groups {
, SPR_GROUP_POWER, SPR_GROUP_PIC, SPR_GROUP_TICK, SPR_GROUP_FPU
} SPR_GROUPS;
-/* Enum declaration for special purpose register indicies. */
+/* Enum declaration for special purpose register indices. */
typedef enum spr_reg_indices {
SPR_INDEX_SYS_VR = 0, SPR_INDEX_SYS_UPR = 1, SPR_INDEX_SYS_CPUCFGR = 2, SPR_INDEX_SYS_DMMUCFGR = 3
, SPR_INDEX_SYS_IMMUCFGR = 4, SPR_INDEX_SYS_DCCFGR = 5, SPR_INDEX_SYS_ICCFGR = 6, SPR_INDEX_SYS_DCFGR = 7
diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c
index 65a3b32..0f02122 100644
--- a/opcodes/or1k-dis.c
+++ b/opcodes/or1k-dis.c
@@ -400,7 +400,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 8c59033..a364dc4 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -416,7 +416,7 @@ const struct powerpc_operand powerpc_operands[] =
#define FXM4 FXM + 1
{ 0xff, 12, insert_fxm, extract_fxm,
PPC_OPERAND_OPTIONAL | PPC_OPERAND_OPTIONAL_VALUE},
- /* If the FXM4 operand is ommitted, use the sentinel value -1. */
+ /* If the FXM4 operand is omitted, use the sentinel value -1. */
{ -1, -1, NULL, NULL, 0},
/* The IMM20 field in an LI instruction. */
@@ -705,7 +705,7 @@ const struct powerpc_operand powerpc_operands[] =
#define TBR SV + 1
{ 0x3ff, 11, insert_tbr, extract_tbr,
PPC_OPERAND_OPTIONAL | PPC_OPERAND_OPTIONAL_VALUE},
- /* If the TBR operand is ommitted, use the value 268. */
+ /* If the TBR operand is omitted, use the value 268. */
{ -1, 268, NULL, NULL, 0},
/* The TO field in a D or X form instruction. */
@@ -845,7 +845,7 @@ const struct powerpc_operand powerpc_operands[] =
/* The S field in a XL form instruction. */
#define SXL S + 1
{ 0x1, 11, NULL, NULL, PPC_OPERAND_OPTIONAL | PPC_OPERAND_OPTIONAL_VALUE},
- /* If the SXL operand is ommitted, use the value 1. */
+ /* If the SXL operand is omitted, use the value 1. */
{ -1, 1, NULL, NULL, 0},
/* SH field starting at bit position 16. */
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 7af514b..f2e193f 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -399,7 +399,7 @@ print_insn_sh (bfd_vma memaddr, struct disassemble_info *info)
target_arch = arch_sh1;
/* SH coff object files lack information about the machine type, so
we end up with bfd_mach_sh unless it was set explicitly (which
- could have happended if this is a call from gdb or the simulator.) */
+ could have happened if this is a call from gdb or the simulator.) */
if (info->symbols
&& bfd_asymbol_flavour(*info->symbols) == bfd_target_coff_flavour)
target_arch = arch_sh4;
diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c
index e29a4e0..b8da0b8 100644
--- a/opcodes/sh64-dis.c
+++ b/opcodes/sh64-dis.c
@@ -44,7 +44,7 @@ struct sh64_disassemble_info
unsigned int address_reg;
bfd_signed_vma built_address;
- /* This is the range decriptor for the current address. It is kept
+ /* This is the range descriptor for the current address. It is kept
around for the next call. */
sh64_elf_crange crange;
};
diff --git a/opcodes/tic30-dis.c b/opcodes/tic30-dis.c
index 614da14..07b25f9 100644
--- a/opcodes/tic30-dis.c
+++ b/opcodes/tic30-dis.c
@@ -687,7 +687,7 @@ print_insn_tic30 (bfd_vma pc, disassemble_info *info)
insn_word = (*(info->buffer + bufaddr) << 24) | (*(info->buffer + bufaddr + 1) << 16) |
(*(info->buffer + bufaddr + 2) << 8) | *(info->buffer + bufaddr + 3);
_pc = pc / 4;
- /* Get the instruction refered to by the current instruction word
+ /* Get the instruction referred to by the current instruction word
and print it out based on its type. */
if (!get_tic30_instruction (insn_word, &insn))
return -1;
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index d5e54a5..b1d47d3 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -1329,7 +1329,7 @@ const struct v850_operand v850_operands[] =
sorted by major opcode.
The table is also sorted by name. This is used by the assembler.
- When parsing an instruction the assembler finds the first occurance
+ When parsing an instruction the assembler finds the first occurrence
of the name of the instruciton in this table and then attempts to
match the instruction's arguments with description of the operands
associated with the entry it has just found in this table. If the
diff --git a/opcodes/xc16x-asm.c b/opcodes/xc16x-asm.c
index 509cbaa..ffb114c 100644
--- a/opcodes/xc16x-asm.c
+++ b/opcodes/xc16x-asm.c
@@ -663,7 +663,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c
index c8e67d4..951cb2e 100644
--- a/opcodes/xc16x-dis.c
+++ b/opcodes/xc16x-dis.c
@@ -679,7 +679,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/xstormy16-asm.c b/opcodes/xstormy16-asm.c
index bd91d82..f74a98a 100644
--- a/opcodes/xstormy16-asm.c
+++ b/opcodes/xstormy16-asm.c
@@ -563,7 +563,7 @@ parse_insn_normal (CGEN_CPU_DESC cd,
still needs to be converted to target byte order, otherwise BUF is an array
of bytes in target byte order.
The result is a pointer to the insn's entry in the opcode table,
- or NULL if an error occured (an error message will have already been
+ or NULL if an error occurred (an error message will have already been
printed).
Note that when processing (non-alias) macro-insns,
diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c
index 2c273d4..df9f36b 100644
--- a/opcodes/xstormy16-dis.c
+++ b/opcodes/xstormy16-dis.c
@@ -427,7 +427,7 @@ print_insn (CGEN_CPU_DESC cd,
/* Default value for CGEN_PRINT_INSN.
The result is the size of the insn in bytes or zero for an unknown insn
- or -1 if an error occured fetching bytes. */
+ or -1 if an error occurred fetching bytes. */
#ifndef CGEN_PRINT_INSN
#define CGEN_PRINT_INSN default_print_insn
diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c
index db3bbee..27de320 100644
--- a/opcodes/xtensa-dis.c
+++ b/opcodes/xtensa-dis.c
@@ -160,7 +160,7 @@ print_insn_xtensa (bfd_vma memaddr, struct disassemble_info *info)
an 80-column screen.) The value of bytes_per_line here is not exactly
right, because objdump adds an extra space for each chunk so that the
amount of whitespace depends on the chunk size. Oh well, it's good
- enough.... Note that we set the minimum size to 4 to accomodate
+ enough.... Note that we set the minimum size to 4 to accommodate
literal pools. */
info->bytes_per_line = MAX (maxsize, 4);
diff --git a/readline/display.c b/readline/display.c
index 9044305..8086f23 100644
--- a/readline/display.c
+++ b/readline/display.c
@@ -1544,7 +1544,7 @@ update_line (old, new, current_line, omax, nmax, inv_botlin)
o_cpos = _rl_last_c_pos;
/* When this function returns, _rl_last_c_pos is correct, and an absolute
- cursor postion in multibyte mode, but a buffer index when not in a
+ cursor position in multibyte mode, but a buffer index when not in a
multibyte locale. */
_rl_move_cursor_relative (od, old);
#if 1
diff --git a/readline/examples/rlfe/rlfe.c b/readline/examples/rlfe/rlfe.c
index eacd5ab..7886448 100644
--- a/readline/examples/rlfe/rlfe.c
+++ b/readline/examples/rlfe/rlfe.c
@@ -127,7 +127,7 @@ static int hist_size = 0;
we're actually editing. Then we send the line to the inferior, and the
terminal driver send back an extra echo.
The work-around is to remember the input lines, and when we see that
- line come back, we supress the output.
+ line come back, we suppress the output.
A better solution (supposedly available on SVR4) would be a smarter
terminal driver, with more flags ... */
#define ECHO_SUPPRESS_MAX 1024
diff --git a/readline/examples/rlptytest.c b/readline/examples/rlptytest.c
index 79257db..d1893ed 100644
--- a/readline/examples/rlptytest.c
+++ b/readline/examples/rlptytest.c
@@ -213,7 +213,7 @@ static enum { RESET, TCBREAK } ttystate = RESET;
*
* fd - The file descriptor of the terminal
*
- * Returns: 0 on sucess, -1 on error
+ * Returns: 0 on success, -1 on error
*/
int tty_cbreak(int fd){
struct termios buf;
diff --git a/readline/histexpand.c b/readline/histexpand.c
index 8fb3798..a1a828c 100644
--- a/readline/histexpand.c
+++ b/readline/histexpand.c
@@ -81,7 +81,7 @@ char history_expansion_char = '!';
char history_subst_char = '^';
/* During tokenization, if this character is seen as the first character
- of a word, then it, and all subsequent characters upto a newline are
+ of a word, then it, and all subsequent characters up to a newline are
ignored. For a Bourne shell, this should be '#'. Bash special cases
the interactive comment character to not be a comment delimiter. */
char history_comment_char = '\0';
@@ -894,7 +894,7 @@ history_expand_internal (string, start, end_index_ptr, ret_string, current_line)
1) If expansions did take place
2) If the `p' modifier was given and the caller should print the result
- If an error ocurred in expansion, then OUTPUT contains a descriptive
+ If an error occurred in expansion, then OUTPUT contains a descriptive
error message. */
#define ADD_STRING(s) \
diff --git a/readline/history.h b/readline/history.h
index 1257e66..c8af47e 100644
--- a/readline/history.h
+++ b/readline/history.h
@@ -216,7 +216,7 @@ extern int history_truncate_file PARAMS((const char *, int));
-1) If there was an error in expansion.
2) If the returned line should just be printed.
- If an error ocurred in expansion, then OUTPUT contains a descriptive
+ If an error occurred in expansion, then OUTPUT contains a descriptive
error message. */
extern int history_expand PARAMS((char *, char **));
diff --git a/readline/input.c b/readline/input.c
index e35277f..a40b45e 100644
--- a/readline/input.c
+++ b/readline/input.c
@@ -539,7 +539,7 @@ rl_getc (stream)
/* If the error that we received was SIGINT, then try again,
this is simply an interrupted system call to read ().
- Otherwise, some error ocurred, also signifying EOF. */
+ Otherwise, some error occurred, also signifying EOF. */
if (errno != EINTR)
return (RL_ISSTATE (RL_STATE_READCMD) ? READERR : EOF);
}
diff --git a/readline/readline.c b/readline/readline.c
index 071e1aa..ca0946f 100644
--- a/readline/readline.c
+++ b/readline/readline.c
@@ -238,7 +238,7 @@ int rl_erase_empty_line = 0;
character bound to accept-line. */
int rl_num_chars_to_read;
-/* Line buffer and maintenence. */
+/* Line buffer and maintenance. */
char *rl_line_buffer = (char *)NULL;
int rl_line_buffer_len = 0;
diff --git a/readline/rlprivate.h b/readline/rlprivate.h
index 384ff67..7092842 100644
--- a/readline/rlprivate.h
+++ b/readline/rlprivate.h
@@ -189,7 +189,7 @@ extern int rl_blink_matching_paren;
/*************************************************************************
* *
- * Global functions and variables unsed and undocumented *
+ * Global functions and variables unused and undocumented *
* *
*************************************************************************/
diff --git a/readline/text.c b/readline/text.c
index 536e31a..2b09f3c 100644
--- a/readline/text.c
+++ b/readline/text.c
@@ -240,7 +240,7 @@ rl_replace_line (text, clear_undo)
this is the same as rl_end.
Any command that is called interactively receives two arguments.
- The first is a count: the numeric arg pased to this command.
+ The first is a count: the numeric arg passed to this command.
The second is the key which invoked this command.
*/
diff --git a/zlib/contrib/minizip/ioapi.h b/zlib/contrib/minizip/ioapi.h
index 8dcbdb0..e19f5c2 100644
--- a/zlib/contrib/minizip/ioapi.h
+++ b/zlib/contrib/minizip/ioapi.h
@@ -82,7 +82,7 @@
#include "mz64conf.h"
#endif
-/* a type choosen by DEFINE */
+/* a type chosen by DEFINE */
#ifdef HAVE_64BIT_INT_CUSTOM
typedef 64BIT_INT_CUSTOM_TYPE ZPOS64_T;
#else
diff --git a/zlib/contrib/minizip/miniunz.c b/zlib/contrib/minizip/miniunz.c
index 3d65401b..6ca6858 100644
--- a/zlib/contrib/minizip/miniunz.c
+++ b/zlib/contrib/minizip/miniunz.c
@@ -607,7 +607,7 @@ int main(argc,argv)
# endif
strncpy(filename_try, zipfilename,MAXFILENAME-1);
- /* strncpy doesnt append the trailing NULL, of the string is too long. */
+ /* strncpy doesn't append the trailing NULL, of the string is too long. */
filename_try[ MAXFILENAME ] = '\0';
# ifdef USEWIN32IOAPI
diff --git a/zlib/contrib/minizip/minizip.c b/zlib/contrib/minizip/minizip.c
index 4288962..b13ca60 100644
--- a/zlib/contrib/minizip/minizip.c
+++ b/zlib/contrib/minizip/minizip.c
@@ -113,7 +113,7 @@ uLong filetime(f, tmzip, dt)
len = MAXFILENAME;
strncpy(name, f,MAXFILENAME-1);
- /* strncpy doesnt append the trailing NULL, of the string is too long. */
+ /* strncpy doesn't append the trailing NULL, of the string is too long. */
name[ MAXFILENAME ] = '\0';
if (name[len - 1] == '/')
@@ -322,7 +322,7 @@ int main(argc,argv)
zipok = 1 ;
strncpy(filename_try, argv[zipfilenamearg],MAXFILENAME-1);
- /* strncpy doesnt append the trailing NULL, of the string is too long. */
+ /* strncpy doesn't append the trailing NULL, of the string is too long. */
filename_try[ MAXFILENAME ] = '\0';
len=(int)strlen(filename_try);
diff --git a/zlib/contrib/minizip/unzip.c b/zlib/contrib/minizip/unzip.c
index 9093504..cbc482c 100644
--- a/zlib/contrib/minizip/unzip.c
+++ b/zlib/contrib/minizip/unzip.c
@@ -53,7 +53,7 @@
Oct-2009 - Mathias Svensson - Fixed problem if uncompressed size was > 4G and compressed size was <4G
should only read the compressed/uncompressed size from the Zip64 format if
the size from normal header was 0xFFFFFFFF
- Oct-2009 - Mathias Svensson - Applied some bug fixes from paches recived from Gilles Vollant
+ Oct-2009 - Mathias Svensson - Applied some bug fixes from paches received from Gilles Vollant
Oct-2009 - Mathias Svensson - Applied support to unzip files with compression mathod BZIP2 (bzip2 lib is required)
Patch created by Daniel Borca
@@ -200,7 +200,7 @@ typedef struct
/* ===========================================================================
Read a byte from a gz_stream; update next_in and avail_in. Return EOF
for end of file.
- IN assertion: the stream s has been sucessfully opened for reading.
+ IN assertion: the stream s has been successfully opened for reading.
*/
@@ -380,8 +380,8 @@ local int strcmpcasenosensitive_internal (const char* fileName1, const char* fil
/*
Compare two filename (fileName1,fileName2).
- If iCaseSenisivity = 1, comparision is case sensitivity (like strcmp)
- If iCaseSenisivity = 2, comparision is not case sensitivity (like strcmpi
+ If iCaseSenisivity = 1, comparison is case sensitivity (like strcmp)
+ If iCaseSenisivity = 2, comparison is not case sensitivity (like strcmpi
or strcasecmp)
If iCaseSenisivity = 0, case sensitivity is defaut of your operating system
(like 1 on Unix, 2 on Windows)
diff --git a/zlib/contrib/minizip/unzip.h b/zlib/contrib/minizip/unzip.h
index 2104e39..9e7378d 100644
--- a/zlib/contrib/minizip/unzip.h
+++ b/zlib/contrib/minizip/unzip.h
@@ -155,8 +155,8 @@ extern int ZEXPORT unzStringFileNameCompare OF ((const char* fileName1,
int iCaseSensitivity));
/*
Compare two filename (fileName1,fileName2).
- If iCaseSenisivity = 1, comparision is case sensitivity (like strcmp)
- If iCaseSenisivity = 2, comparision is not case sensitivity (like strcmpi
+ If iCaseSenisivity = 1, comparison is case sensitivity (like strcmp)
+ If iCaseSenisivity = 2, comparison is not case sensitivity (like strcmpi
or strcasecmp)
If iCaseSenisivity = 0, case sensitivity is defaut of your operating system
(like 1 on Unix, 2 on Windows)
diff --git a/zlib/contrib/minizip/zip.c b/zlib/contrib/minizip/zip.c
index ea54853..976aad0 100644
--- a/zlib/contrib/minizip/zip.c
+++ b/zlib/contrib/minizip/zip.c
@@ -15,7 +15,7 @@
Oct-2009 - Mathias Svensson - Did some code cleanup and refactoring to get better overview of some functions.
Oct-2009 - Mathias Svensson - Added zipRemoveExtraInfoBlock to strip extra field data from its ZIP64 data
It is used when recreting zip archive with RAW when deleting items from a zip.
- ZIP64 data is automaticly added to items that needs it, and existing ZIP64 data need to be removed.
+ ZIP64 data is automatically added to items that needs it, and existing ZIP64 data need to be removed.
Oct-2009 - Mathias Svensson - Added support for BZIP2 as compression mode (bzip2 lib is required)
Jan-2010 - back to unzip and minizip 1.0 name scheme, with compatibility layer
diff --git a/zlib/examples/enough.c b/zlib/examples/enough.c
index b991144..b81f502 100644
--- a/zlib/examples/enough.c
+++ b/zlib/examples/enough.c
@@ -402,7 +402,7 @@ local void examine(int syms, int len, int left, int mem, int rem)
requires that maximum. Uses the globals max, root, and num. */
local void enough(int syms)
{
- int n; /* number of remaing symbols for this node */
+ int n; /* number of remaining symbols for this node */
int left; /* number of unused bit patterns at this length */
size_t index; /* index of this case in *num */
diff --git a/zlib/examples/zran.c b/zlib/examples/zran.c
index 278f9ad..b8c87e4 100644
--- a/zlib/examples/zran.c
+++ b/zlib/examples/zran.c
@@ -19,7 +19,7 @@
An access point can be created at the start of any deflate block, by saving
the starting file offset and bit of that block, and the 32K bytes of
uncompressed data that precede that block. Also the uncompressed offset of
- that block is saved to provide a referece for locating a desired starting
+ that block is saved to provide a reference for locating a desired starting
point in the uncompressed stream. build_index() works by decompressing the
input zlib or gzip stream a block at a time, and at the end of each block
deciding if enough uncompressed data has gone by to justify the creation of
--
2.7.4