Re: [PATCH v2 09/10] Ptrace support for AArch64 SVE gdbsever

[Simon Marchi <simark at simark dot ca>]

On 2018-06-06 11:16 AM, Alan Hayward wrote:
> diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c
> index 9db9a7c1c3..e7fec25a64 100644
> --- a/gdb/gdbserver/linux-aarch64-low.c
> +++ b/gdb/gdbserver/linux-aarch64-low.c
> @@ -73,6 +73,16 @@ is_64bit_tdesc (void)
>    return register_size (regcache->tdesc, 0) == 8;
>  }
>  
> +static bool
> +is_sve_tdesc (void)
> +{
> +  struct regcache *regcache = get_thread_regcache (current_thread, 0);
> +
> +  /* Mimimum size of Z0 on SVE is 256bit.  If not SVE, then Z0 will be the
> +     128bit V0 register.  */
> +  return register_size (regcache->tdesc, AARCH64_SVE_Z0_REGNUM) >= 32;

Hmm maybe I read wrong, but can't the SVE registers be 128 bits long?  Maybe this
is not up to date, but here it says

   "enabling implementation choices for vector lengths that scale from 128 to 2048 bits."

https://community.arm.com/processors/b/blog/posts/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture

Simon