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Re: [PATCH v2 2/4] Use the existing instruction to determine the RISC-V breakpoint kind.
- From: Simon Marchi <simon dot marchi at ericsson dot com>
- To: John Baldwin <jhb at FreeBSD dot org>, "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>
- Cc: "andrew dot burgess at embecosm dot com" <andrew dot burgess at embecosm dot com>, "jimw at sifive dot com" <jimw at sifive dot com>
- Date: Thu, 27 Sep 2018 19:47:53 +0000
- Subject: Re: [PATCH v2 2/4] Use the existing instruction to determine the RISC-V breakpoint kind.
- References: <20180924205151.22217-1-jhb@FreeBSD.org> <20180924205151.22217-3-jhb@FreeBSD.org>
On 2018-09-24 04:51 PM, John Baldwin wrote:
> @@ -417,7 +411,21 @@ riscv_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
> {
> if (use_compressed_breakpoints == AUTO_BOOLEAN_AUTO)
> {
> - if (riscv_has_feature (gdbarch, 'C'))
> + gdb_byte buf[1];
> + int status;
> +
> + /* Read the opcode byte to determine the instruction length. */
> + status = target_read_code (*pcptr, buf, 1);
> + if (status)
> + memory_error (TARGET_XFER_E_IO, *pcptr);
Here you could use read_code if you want, which takes care of throwing an exception
on failure.
Based on the discussion you guys had about v1, this looks good to me, but the RISC-V
experts should take a look.
Simon