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Re: [PATCH 2/2] RISC-V: NaN-box FP values smaller than an FP register.

From: Jim Wilson <jimw at sifive dot com>
To: kevinb at redhat dot com
Cc: gdb-patches at sourceware dot org
Date: Mon, 22 Oct 2018 14:21:36 -0700
Subject: Re: [PATCH 2/2] RISC-V: NaN-box FP values smaller than an FP register.
References: <CAFyWVabswzH+cwN6aBgPbP-ccUjUC2iya+HUyLjYzxLgUaM_Zg@mail.gmail.com> <20181019214953.9010-1-jimw@sifive.com> <20181020143947.0bdcf4ae@pinnacle.lan>

On Sat, Oct 20, 2018 at 2:39 PM Kevin Buettner <kevinb@redhat.com> wrote:
> On Fri, 19 Oct 2018 14:49:53 -0700
> Jim Wilson <jimw@sifive.com> wrote:
>
> > The hardware requires that values in FP registers be NaN-boxed, so we must
> > extend them with 1's instead of 0's as we do for integer values.
> >
> >       gdb/
> >       * riscv-tdep.c (riscv_push_dummy_call) <in_reg>: Check for value in
> >       FP reg smaller than FP reg size, and fill with -1 instead of 0.
>
> Okay.

Committed.

Jim

References:
- [PATCH 0/2] RISC-V: Improve FP register support.
  - From: Jim Wilson
- [PATCH 2/2] RISC-V: NaN-box FP values smaller than an FP register.
  - From: Jim Wilson
- Re: [PATCH 2/2] RISC-V: NaN-box FP values smaller than an FP register.
  - From: Kevin Buettner

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