The FPU is optional on RISC-V. The gdb.base/float.exp test currently
assumes that an fpu is always available on RISC-V. Update the test so
that this is not the case.
gdb/testsuite/ChangeLog:
* gdb.base/float.exp: Handle RISC-V targets without an FPU.
---
gdb/testsuite/ChangeLog | 4 ++++
gdb/testsuite/gdb.base/float.exp | 10 +++++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/gdb/testsuite/gdb.base/float.exp b/gdb/testsuite/gdb.base/float.exp
index 71d3f60c499..23d68a13dfc 100644
--- a/gdb/testsuite/gdb.base/float.exp
+++ b/gdb/testsuite/gdb.base/float.exp
@@ -111,7 +111,15 @@ if { [is_aarch64_target] } then {
} elseif [istarget "sparc*-*-*"] then {
gdb_test "info float" "f0.*f1.*f31.*d0.*d30.*" "info float"
} elseif [istarget "riscv*-*-*"] then {
- gdb_test "info float" "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*" "info float"
+ # RISC-V may or may not have an FPU
+ gdb_test_multiple "info float" "info float" {
+ -re "ft0.*ft1.*ft11.*fflags.*frm.*fcsr.*$gdb_prompt $" {
+ pass "info float (with FPU)"
+ }
+ -re "No floating.point info available for this processor.*$gdb_prompt $" {
+ pass "info float (without FPU)"
+ }
+ }
} else {
gdb_test "info float" "No floating.point info available for this processor." "info float (unknown target)"
}