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Re: [PATCH 0/2] RISC-V miscellaneous register fixes
- From: Andrew Burgess <andrew dot burgess at embecosm dot com>
- To: gdb-patches at sourceware dot org
- Cc: jimw at sifive dot com, palmer at sifive dot com, jhb at FreeBSD dot org
- Date: Mon, 24 Dec 2018 09:49:20 +0000
- Subject: Re: [PATCH 0/2] RISC-V miscellaneous register fixes
- References: <cover.1544734579.git.andrew.burgess@embecosm.com>
* Andrew Burgess <andrew.burgess@embecosm.com> [2018-12-13 20:57:48 +0000]:
> Fixes a couple of register related issues with RISC-V.
>
Both of these are now pushed.
Thanks,
Andrew
> ---
>
> Andrew Burgess (2):
> gdb/riscv: Add gdb to dwarf register number mapping
> gdb/riscv: Add float status registers to save and restore reggroups
>
> gdb/ChangeLog | 11 +++++++++++
> gdb/riscv-tdep.c | 22 +++++++++++++++++++++-
> gdb/riscv-tdep.h | 9 +++++++++
> 3 files changed, 41 insertions(+), 1 deletion(-)
>
> --
> 2.14.5
>