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Anybody, I'm developing an application on a an IDT MIPS R4650 based board. this MIPS CPU has a DWATCH register capable of breaking on a data read or write (or both). What must I do to the host portion of GDB to let it know my target is capable of implimenting a "hardware" breakpoint? Further what must I do to modify my target GDB stub? I suspect the host part is simply a re-configuration of somthing in the .gdbini file. I expect that the target stub needs to parse a new command in handle_exception() through the "target remote" protocol. But I haven't yet found the magic words. -- Sincerely, M. David Gelbman, Senior Software Engineer Network Peripherals, Inc. <NASDAQ:NPIX> 4170 Veteran's Memorial Highway, Bohemia, NY 11716-1009 516.737.2363 (voice) 516.737.2372 (FAX) ftp://per_need whois:mdg mailto:dgelbman@npiny.com http://www.npix.com