Re: MIPS o32 ABI spec, $fp1 valid?

[Daniel Jacobowitz <drow at mvista dot com>]

On Mon, Jun 16, 2003 at 02:36:29PM -0400, Andrew Cagney wrote:
> Hello,
> 
> KevinB and I were discussing MIPS cleanups for better handling things 
> like o32 ABI.  One question was can the o32 ABI use odd floating point 
> registers?  The MIPS certainly has them, and instructions can certainly 
> access them.  However, according to the o32 ABI, can they be used?
> 
> (alternativly, does anyone have a MIPS o32 ABI spec, and even the 
> original ABI spec that went with the MIPS 1).

Hum, here's what the SysV ABI Supplement for MIPS (1996?) has to say:

Co-processor 1 adds 32 32-bit floating-point general registers and a
32-bit control/status register. Each even/odd pair of the 32
floating-point general registers can be used as either a 32-bit
single-precision floating-point register or as a 64-bit
double-precision floating-point register. For single-precision values,
the even-numbered floating-point register holds the value. For
double-precision values, the even-numbered floating-point register
holds the least significant 32 bits of the value and the odd-numbered
floating-point register holds the most significant 32 bits of the
value. This is always true, regardless of the byte ordering conventions
in use ( big endian or little endian).


Which is actually pretty ambiguous, but GCC goes out of its way not to
put floats in odd-numbered FP registers (unless -msingle-float), so I'm
guessing that the ABI spec says they may _not_ be used.

-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer