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Re: how are debug registers supposed to work?
- From: Ben Johnson <ben at blarg dot net>
- To: gdb at sources dot redhat dot com
- Date: Tue, 16 Sep 2003 17:30:40 -0700
- Subject: Re: how are debug registers supposed to work?
- References: <20030828174129.B9184@blarg.net>
I found the problem. The addresses I'm attempting to use are logical
addresses, not linear. The (2.0) kernel data segment's base address is
0xc0000000, so in order to get a linear address I have to add that base
address to it.
altered code that's now trapping in the right place:
schedule()
{
...
static unsigned long has_run = 1;
static unsigned long has_run_2 = 0;
if( ! has_run && jiffies > 7000 )
{
has_run = 1;
has_run_2 = 0;
/* setup the debug registers */
asm ("movl %%cr4, %%edx\n" /* debug extensions */
" orl $0x8, %%edx\n"
" movl %%edx, %%cr4\n"
" movl %0, %%db0\n" /* push into db regs */
" movl %1, %%db7\n"
" lgdt 0x00106852\n" /* pentium may need this */
: /* no output */
:"a"(0xc0000000 + ((unsigned long)&has_run_2)),
"b"(0x000f2202)
/*"m"((((char *)&gdt)-6))*/
:"%edx"
);
}
if( has_run && ! has_run_2 ) /* debug reg generate exception */
{
/* whatever */
has_run_2 = 0xffffffff
}
...
}
I'm sure the debug extensions aren't needed. I put in the lgdt
instruction because I read section in 18.17.4 of Intel's Software
Development Manual (Volume 3) that it may help Pentium processors
recognize breakpoints. no other processors need that though.
- Ben