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Re: 'g/G' GDB commands


I've made a mistake. GDB accepts my reponse with the '0' padding of one 32
bits register (csr).

Thanks.


Guillaume MENANT wrote:
> 
> I've implemented the reply to the 'g' command but GDB sends me a nack
> ('-') each time (3 times and then freeze).
> 
> I'm working on a Atmel AT697E (Sparc V8) in which all registers printed
> with "maint print registers" command exists except csr and dx registers
> (last registers listed below). So I tried to send only supported registers
> (GDB sends nack) and also tried to add '0' padding in order to fill the
> non-implemented registers (same response).
> 
> How can I see why GDB sends me a nack ? What can I do ?
> 
> PS : I'm using sparc-elf-gdb debugger
> 
> Thanks a lot for your answers.
> 
> 
> 
> Guillaume MENANT wrote:
>> 
>> I've found the register layout for the g/G commands with the "maint print
>> registers" command and it looks like this : 
>> 
>> Name         Nr  Rel Offset    Size  Type
>> g0            0    0      0       4 int32_t
>> g1            1    1      4       4 int32_t
>> g2            2    2      8       4 int32_t
>> g3            3    3     12       4 int32_t
>> g4            4    4     16       4 int32_t
>> g5            5    5     20       4 int32_t
>> g6            6    6     24       4 int32_t
>> g7            7    7     28       4 int32_t
>> o0            8    8     32       4 int32_t
>> o1            9    9     36       4 int32_t
>> o2           10   10     40       4 int32_t
>> o3           11   11     44       4 int32_t
>> o4           12   12     48       4 int32_t
>> o5           13   13     52       4 int32_t
>> sp           14   14     56       4 *1
>> o7           15   15     60       4 int32_t
>> l0           16   16     64       4 int32_t
>> l1           17   17     68       4 int32_t
>> l2           18   18     72       4 int32_t
>> l3           19   19     76       4 int32_t
>> l4           20   20     80       4 int32_t
>> l5           21   21     84       4 int32_t
>> l6           22   22     88       4 int32_t
>> l7           23   23     92       4 int32_t
>> i0           24   24     96       4 int32_t
>> i1           25   25    100       4 int32_t
>> i2           26   26    104       4 int32_t
>> i3           27   27    108       4 int32_t
>> i4           28   28    112       4 int32_t
>> i5           29   29    116       4 int32_t
>> fp           30   30    120       4 *1
>> i7           31   31    124       4 int32_t
>> f0           32   32    128       4 float
>> f1           33   33    132       4 float
>> f2           34   34    136       4 float
>> f3           35   35    140       4 float
>> f4           36   36    144       4 float
>> f5           37   37    148       4 float
>> f6           38   38    152       4 float
>> f7           39   39    156       4 float
>> f8           40   40    160       4 float
>> f9           41   41    164       4 float
>> f10          42   42    168       4 float
>> f11          43   43    172       4 float
>> f12          44   44    176       4 float
>> f13          45   45    180       4 float
>> f14          46   46    184       4 float
>> f15          47   47    188       4 float
>> f16          48   48    192       4 float
>> f17          49   49    196       4 float
>> f18          50   50    200       4 float
>> f19          51   51    204       4 float
>> f20          52   52    208       4 float
>> f21          53   53    212       4 float
>> f22          54   54    216       4 float
>> f23          55   55    220       4 float
>> f24          56   56    224       4 float
>> f25          57   57    228       4 float
>> f26          58   58    232       4 float
>> f27          59   59    236       4 float
>> f28          60   60    240       4 float
>> f29          61   61    244       4 float
>> f30          62   62    248       4 float
>> f31          63   63    252       4 float
>> y            64   64    256       4 int32_t
>> psr          65   65    260       4 int32_t
>> wim          66   66    264       4 int32_t
>> tbr          67   67    268       4 int32_t
>> pc           68   68    272       4 *1
>> npc          69   69    276       4 *1
>> fsr          70   70    280       4 int32_t
>> csr          71   71    284       4 int32_t
>> d0           72    0    288       8 double
>> d2           73    1    296       8 double
>> d4           74    2    304       8 double
>> d6           75    3    312       8 double
>> d8           76    4    320       8 double
>> d10          77    5    328       8 double
>> d12          78    6    336       8 double
>> d14          79    7    344       8 double
>> d16          80    8    352       8 double
>> d18          81    9    360       8 double
>> d20          82   10    368       8 double
>> d22          83   11    376       8 double
>> d24          84   12    384       8 double
>> d26          85   13    392       8 double
>> d28          86   14    400       8 double
>> d30          87   15    408       8 double
>> 
>> Thanks for your answers.
>> 
>> 
>> Daniel Jacobowitz-2 wrote:
>>> 
>>> On Thu, Nov 15, 2007 at 10:54:27AM +0100, Guillaume MENANT wrote:
>>>> The chip I want to debug is the Atmel AT697E and I don't really know
>>>> which 
>>>> register of the AT697E corresponds to "32 general-purpose", "sr", "lo",
>>>> "hi", 
>>>> "bad", "cause", "fsr", "fir"... How can I have more information about
>>>> that ?
>>> 
>>> I doubt the Atmel AT697E is a MIPS; it's a SPARC, seems like.
>>> So that paragraph does not apply.
>>> 
>>> Configure a SPARC-targeted GDB and look at the output of "maint print
>>> registers".  That should give you an idea of the layout GDB expects.
>>> 
>>> -- 
>>> Daniel Jacobowitz
>>> CodeSourcery
>>> 
>>> 
>> 
>> 
> 
> 

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