[Bug libc/2734] New: x86 BSWAP instruction in byteswap.h only used for Intel CPUs, not Athlon

["x00000000 at freenet dot de" <sourceware-bugzilla at sourceware dot org>]

In libc/sysdeps/i386/bits/byteswap.h, the __bswap_32() macro doesn't use the
faster BSWAP instruction if none of __i486__, __pentium__, __pentiumpro__,
__pentium4__ are defined. Thus, Athlon systems (and others) will use the slower
multiple ROR instructions.

Offending code in libc/sysdeps/i386/bits/byteswap.h:

/* To swap the bytes in a word the i486 processors and up provide the
   `bswap' opcode.  On i386 we have to use three instructions.  */
#  if !defined __i486__ && !defined __pentium__ && !defined __pentiumpro__ \
      && !defined __pentium4__
#   define __bswap_32(x)						      \
     (__extension__							      \
      ({ register unsigned int __v, __x = (x);				      \
	 if (__builtin_constant_p (__x))				      \
	   __v = __bswap_constant_32 (__x);				      \
	 else								      \
	   __asm__ ("rorw $8, %w0;"					      \
		    "rorl $16, %0;"					      \
		    "rorw $8, %w0"					      \
		    : "=r" (__v)					      \
		    : "0" (__x)						      \
		    : "cc");						      \
	 __v; }))
#  else
#   define __bswap_32(x) \
     (__extension__							      \
      ({ register unsigned int __v, __x = (x);				      \
	 if (__builtin_constant_p (__x))				      \
	   __v = __bswap_constant_32 (__x);				      \
	 else								      \
	   __asm__ ("bswap %0" : "=r" (__v) : "0" (__x));		      \
	 __v; }))
#  endif

-- 
           Summary: x86 BSWAP instruction in byteswap.h only used for Intel
                    CPUs, not Athlon
           Product: glibc
           Version: unspecified
            Status: NEW
          Severity: minor
          Priority: P2
         Component: libc
        AssignedTo: drepper at redhat dot com
        ReportedBy: x00000000 at freenet dot de
                CC: glibc-bugs at sources dot redhat dot com


http://sourceware.org/bugzilla/show_bug.cgi?id=2734

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