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A few month ago there was a short discussion about __setfpucw and how
to portable set floating point exception _mask_ bits (I'm appending
two emails from that thread).  Geoff proposed to add two functions
`feenableexcept' and `fedisableexcept' to enable and disable
individual exceptions.  Zack proposed to implement the <ieeefp.h>
interface (btw. I don't think they're part of any standard - AFAIK
they're Sun specific).  I've added the exception control part from
Solaris 7 to explain the concept.

The discussion stopped without any results.  

David Munro  contacted me and asked for a FE_NUMERIC_ENV since he
only needs a certain subset of the masks for his numeric software:
> FE_NUMERIC_ENV   -- zero divide, overflow, invalid exceptions unmasked,
>                    all others masked
>                    plus rapid flush to zero on processors which implement
>                    IEEE 754 denormal in software (slowly)

David's suggestion leads to a minimal patch - but opens a can of worms
(everybody likes to have his favorite environment set).  I rather
would like to have a general solution and prefer Geoff's proposal.

I could try implement this - if we come to any agreement.

So what do you think?

Andreas

>From  <ieeefp.h>  (Solaris 7):
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/*
 * EXCEPTION CONTROL *****************************************
 *
 */

#define	fp_except	int

#define	FP_DISABLE	0	/* exception will be ignored */
#define	FP_ENABLE	1	/* exception will cause SIGFPE */
#define	FP_CLEAR	0	/* exception has not occurred */
#define	FP_SET		1	/* exception has occurred */

#if __i386_conditional

/*
 * There are six floating point exceptions, which can be individually
 * ENABLED (== 1) or DISABLED (== 0).  When an exception occurs
 * (ENABLED or not), the fact is noted by changing an associated
 * "sticky bit" from CLEAR (==0) to SET (==1).
 *
 * NOTE: the bit positions in fp_except are chosen to match those of
 * the 80*87 control word mask bits.  Although the 87 chips actually
 * ENABLE exceptions with a mask value of 0 (not 1, as on the 3b), it
 * is felt that switching these values may create more problems than
 * it solves.
 */

/* an fp_except can have the following (not exclusive) values: */
#define	FP_X_INV	0x01	/* invalid operation exception */
#define	FP_X_DNML	0x02	/* denormalization exception */
#define	FP_X_DZ		0x04	/* divide-by-zero exception */
#define	FP_X_OFL	0x08	/* overflow exception */
#define	FP_X_UFL	0x10	/* underflow exception */
#define	FP_X_IMP	0x20	/* imprecise (loss of precision) */

#endif

#if __sparc_conditional

/*
 * There are five floating-point exceptions, which can be individually
 * ENABLED (== 1) or DISABLED (== 0).  When an exception occurs
 * (ENABLED or not), the fact is noted by changing an associated
 * "sticky bit" from CLEAR (==0) to SET (==1).
 *
 * NOTE: the bit positions in an fp_except are chosen to match that in
 * the Trap Enable Mask of the FSR (Floating Point State Register).
 */

/* an fp_except can have the following (not exclusive) values: */
#define	FP_X_INV	0x10	/* invalid operation exception */
#define	FP_X_OFL	0x08	/* overflow exception */
#define	FP_X_UFL	0x04	/* underflow exception */
#define	FP_X_DZ		0x02	/* divide-by-zero exception */
#define	FP_X_IMP	0x01	/* imprecise (loss of precision) */

#endif

#if defined(__STDC__)
extern fp_except fpgetmask(void);		/* current exception mask */
extern fp_except fpsetmask(fp_except);		/* set mask, return previous */
extern fp_except fpgetsticky(void);		/* return logged exceptions */
extern fp_except fpsetsticky(fp_except);	/* change logged exceptions */

#else
extern fp_except fpgetmask();	/* current exception mask */
extern fp_except fpsetmask();	/* set mask, return previous */
extern fp_except fpgetsticky();	/* return logged exceptions */
extern fp_except fpsetsticky();	/* change logged exceptions */

#endif
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~



Topics:
   Re: Fwd: __setfpucw 
   Re: Fwd: __setfpucw


----------------------------------------------------------------------

Date: Fri, 21 May 1999 12:41:30 -0400
From: Zack Weinberg <zack@rabi.columbia.edu>
To: drepper@cygnus.com (Ulrich Drepper)
cc: Joel Klecker <jk@espy.org>, libc-alpha@sourceware.cygnus.com
Subject: Re: Fwd: __setfpucw 
Message-Id: <199905211641.MAA24663@blastula.phys.columbia.edu>

On 20 May 1999 22:10:07 -0700, Ulrich Drepper wrote:
>Joel Klecker <jk@espy.org> writes:
>
>> Can I get some comments on this?
>
>__setfpucw is internal and always should have treated like this.
>Glibc 2.1 provides the functionality in a standard interface (see
>fenv.h).

The C9x <fenv.h> interface isn't nearly as flexible as some programs would
like.  You can't request signals for a specific subset of the IEEE
exceptions, for instance.  I'd like to see the SVID <ieeefp.h> interface in
2.2.

zw


------------------------------

Date: Sat, 22 May 1999 17:23:34 +1000
From: Geoff Keating <geoffk@ozemail.com.au>
To: zack@rabi.columbia.edu
CC: drepper@cygnus.com, jk@espy.org, libc-alpha@sourceware.cygnus.com
Subject: Re: Fwd: __setfpucw
Message-Id: <199905220723.RAA00464@geoffk.wattle.id.au>
References:  <199905211641.MAA24663@blastula.phys.columbia.edu>

> Mailing-List: contact libc-alpha-help@sourceware.cygnus.com; run by ezmlm
> cc: Joel Klecker <jk@espy.org>, libc-alpha@sourceware.cygnus.com
> Date: Fri, 21 May 1999 12:41:30 -0400
> From: Zack Weinberg <zack@rabi.columbia.edu>
> 
> On 20 May 1999 22:10:07 -0700, Ulrich Drepper wrote:
> >Joel Klecker <jk@espy.org> writes:
> >
> >> Can I get some comments on this?
> >
> >__setfpucw is internal and always should have treated like this.
> >Glibc 2.1 provides the functionality in a standard interface (see
> >fenv.h).
> 
> The C9x <fenv.h> interface isn't nearly as flexible as some programs would
> like.  You can't request signals for a specific subset of the IEEE
> exceptions, for instance.  I'd like to see the SVID <ieeefp.h> interface in
> 2.2.

I'd much rather just extra calls, `feenableexcept',
`fedisableexcept' which do this:

int feenableexcept(int excepts);

Returns a bitmap containing those exceptions in 'excepts' which were
enabled.  Will not enable _more_ exceptions that 'excepts' specifies;
returns 0 if 'excepts' is not FE_ALL_EXCEPT and cannot enable or
disable exceptions individually.

Note that on PPC, at least, you can test whether exceptions have
occurred at a finer level than you can enable or disable them.  So if
you ask to have just FE_INVALID_SQRT enabled, it'll fail because you can
only enable all the FE_INVALID exceptions at once.

- - 
Geoffrey Keating <geoffk@ozemail.com.au>


------------------------------

End of forwardCFA9Mo Digest
***************************



-- 
 Andreas Jaeger   
  SuSE Labs aj@suse.de	
   private aj@arthur.rhein-neckar.de

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