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Re: Let's see if _this_ works...


> From: Marcus Sundberg <erammsu@kieraypc01.p.y.ki.era.ericsson.se>
> Date: 30 Dec 1999 14:54:57 +0100

> -      for (i = 0; i < size_modified; i += 8)
> +      for (i = 0; i < size_modified; i += 4)

I have done this as part of committing the patch it applies to.

> Geoff Keating <geoffk@ozemail.com.au> writes:
> > > Then there is the issue of memset.S, which also assumes a cache line
> > > size of 32 bytes. Currently I simply move it away when I build glibc,
> > > but it would be nice if that could be solved as well. Now that there
> > > is FP-emulation for PPC in the kernel the cache line issue is the
> > > only thing preventing the same glibc binary from running on 8xx and
> > > other PPC cpus.
> > 
> > I really don't want to halve the speed of bzero() for all machines.
> > Any other ideas?
> 
> Make a check on the first call to memset and cache the result in a
> static variable like getpwd() does?
> 
> The problem is that Motorola seems to think that knowing what CPU
> you're running on compromises system-security, so they made the PVR
> only readble from supervisor mode...
> 
> The best I can think of is to export the PVR from kernel with the
> sysctl interface (only a single syscall to read it as opposed to
> a /proc file or similiar).

I think what should be done here is a runtime test (inside memset.S,
for each execution) which checks whether the line size is 32 or 16
bytes.

The only bit of memset.S that relies on dcbz is this:

	.align 5
	nop
/* Clear lines of memory in 128-byte chunks.  */
L(zloopstart):
	clrlwi r5,r5,27
	mtcrf  0x02,r7
	srwi.  r0,r7,7
	mtctr  r0
	li     r7,0x20
	li     r8,-0x40
	cmplwi cr1,r5,16	# 8
	bf     26,0f
	dcbz   0,r6
	addi   r6,r6,0x20
0:	li     r9,-0x20
	bf     25,1f
	dcbz   0,r6
	dcbz   r7,r6
	addi   r6,r6,0x40	# 16
1:	cmplwi cr5,r5,0
	beq    L(medium)
L(zloop):
	dcbz   0,r6
	dcbz   r7,r6
	addi   r6,r6,0x80
	dcbz   r8,r6
	dcbz   r9,r6
	bdnz   L(zloop)
	beqlr  cr5
	b      L(medium_tail2)

and what we want to do is insert something like this in place of the
first 'dcbz':

      stb	r7,31(r6)
      dcbz	0,r6
      lbz	r10,31(r6)
      cmplw	cr0,r10,r7
      bne	cr0,(somewhere)

-- 
- Geoffrey Keating <geoffk@cygnus.com>

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