Re: [PATCH] Minor performance improvement for AMD64 assemblyroutines

[Nicholas Miell <nmiell at comcast dot net>]

On Mon, 2004-12-06 at 14:41 -0800, Ulrich Drepper wrote:
> Nicholas Miell wrote:
> 
> > AMD's recommended solution is to either reorder instructions so that
> > this situation does not occur, or use the REP prefix on the RET
> > instruction.
> 
> And what is the impact on Intel processors?

Hard to tell, they don't really document what adding a REP prefix to
random instructions does, performance-wise (it obviously doesn't affect
execution, as evidenced by REP NOP becoming PAUSE).

The Intel optimization manual does say to avoid using prefixes where
possible in order to increase decoder throughput. When tuning for
nocona, gcc doesn't generate the prefixes.

So, whether or not it's worthwhile is debatable. I'd say yes, simply
because there's more people running AMD processors in 64-bit mode than
Intel processors, and the performance impact on Intel processors isn't
likely to be very noticeable.

-- 
Nicholas Miell <nmiell@comcast.net>