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[PATCH] Prevent Altivec and VSX insns on PowerPC64 when no FPRs orVRs are avail.
- From: Ryan Arnold <rsa at us dot ibm dot com>
- To: libc-alpha at sources dot redhat dot com
- Date: Thu, 19 May 2011 11:39:12 -0500
- Subject: [PATCH] Prevent Altivec and VSX insns on PowerPC64 when no FPRs orVRs are avail.
- Reply-to: rsa at us dot ibm dot com
The PowerPC64 Makefile variable "no-special-regs" uses the -ffixed-*
directives to disable float and vector register (and thus vector scalar
register) usage by the compiler for certain modules. GCC version 4.6 is
more aggressive in emitting instructions from new instruction sets (like
Altivec and VSX) for optimization. If it emits these instructions when
there are no VRs or VSRs available the compiler will ICE.
The following patch adds -mno-vsx and -mno-altivec to the
"no-special-regs" variable to ensure that these instructions are not
emitted when their corresponding register sets are explicitly disabled.
I've checked this into my ibm-2.13 branch and I've verified that it can
be cherry-picked into master with the following:
git cherry-pick -x 4749a0058b27274a95c5a798e339c7299cdf890e
Ryan S. Arnold
IBM Linux Technology Center
2011-05-18 Ryan S. Arnold <rsa@us.ibm.com>
* sysdeps/powerpc/powerpc64/Makefile (no-special-regs): Add -mno-vsx
and -mno-altivec to prevent the compiler from using Altivec and/or
VSX instructions when the corresponding registers are not available.
diff --git a/sysdeps/powerpc/powerpc64/Makefile b/sysdeps/powerpc/powerpc64/Makefile
index fe96aae..4d9be6c 100644
--- a/sysdeps/powerpc/powerpc64/Makefile
+++ b/sysdeps/powerpc/powerpc64/Makefile
@@ -12,7 +12,10 @@ endif
# These flags prevent FPU or Altivec registers from being used,
# for code called in contexts that is not allowed to touch those registers.
-# Stupid GCC requires us to pass all these ridiculous switches.
+# Stupid GCC requires us to pass all these ridiculous switches. We need to
+# pass the -mno-* switches as well to prevent the compiler from attempting
+# to emit altivec or vsx instructions, especially when the registers aren't
+# available.
no-special-regs := $(sort $(foreach n,40 41 50 51 60 61 62 63 \
$(foreach m,2 3 4 5 6 7 8 9, \
3$m 4$m 5$m),\
@@ -20,7 +23,7 @@ no-special-regs := $(sort $(foreach n,40 41 50 51 60 61 62 63 \
$(sort $(foreach n,$(foreach m,0 1 2 3 4 5 6 7 8 9,\
$m 1$m 2$m) 30 31,\
-ffixed-v$n)) \
- -ffixed-vrsave -ffixed-vscr
+ -ffixed-vrsave -ffixed-vscr -mno-altivec -mno-vsx
ifeq ($(subdir),csu)
sysdep_routines += hp-timing