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[PATCH v2 3/10] Tilera (and Linux asm-generic) support for glibc
- From: Chris Metcalf <cmetcalf at tilera dot com>
- To: libc-alpha at sourceware dot org
- Cc: Arnd Bergmann <arnd at arndb dot de>, Linas Vepstas <linas at codeaurora dot org>, Guan Xuetao <gxt at mprc dot pku dot edu dot cn>, Jonas Bonn <jonas at southpole dot se>, Chen Liqin <liqin dot chen at gmail dot com>
- Date: Wed, 9 Nov 2011 19:56:13 -0500
- Subject: [PATCH v2 3/10] Tilera (and Linux asm-generic) support for glibc
- References: <201111100054.pAA0sf6u025585@farm-0002.internal.tilera.com>
(Unchanged since v1 of the patch)
This patch is changes to the core that are specifically due to adding
the tile architecture.
2011-11-03 Chris Metcalf <cmetcalf@tilera.com>
* elf/elf.h: Include Tilera machine types and relocation values.
* elf/stackguard-macros.h: Provide Tilera STACK_CHK_GUARD() definitions.
* scripts/check-local-headers.sh: Exclude the Tilera <arch/xxx.h> headers.
diff --git a/elf/elf.h b/elf/elf.h
index 7c64120..d0c9cb1 100644
--- a/elf/elf.h
+++ b/elf/elf.h
@@ -251,7 +251,9 @@ typedef struct
#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
-#define EM_NUM 95
+#define EM_TILEPRO 188 /* Tilera TILEPro */
+#define EM_TILEGX 191 /* Tilera TILE-Gx */
+#define EM_NUM 192
/* If it is necessary to assign new unofficial EM_* values, please
pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
@@ -2791,6 +2793,211 @@ typedef Elf32_Addr Elf32_Conflict;
#define R_M32R_NUM 256 /* Keep this the last entry. */
+/* TILEPro relocations. */
+#define R_TILEPRO_NONE 0
+#define R_TILEPRO_32 1
+#define R_TILEPRO_16 2
+#define R_TILEPRO_8 3
+#define R_TILEPRO_32_PCREL 4
+#define R_TILEPRO_16_PCREL 5
+#define R_TILEPRO_8_PCREL 6
+#define R_TILEPRO_LO16 7
+#define R_TILEPRO_HI16 8
+#define R_TILEPRO_HA16 9
+#define R_TILEPRO_COPY 10
+#define R_TILEPRO_GLOB_DAT 11
+#define R_TILEPRO_JMP_SLOT 12
+#define R_TILEPRO_RELATIVE 13
+#define R_TILEPRO_BROFF_X1 14
+#define R_TILEPRO_JOFFLONG_X1 15
+#define R_TILEPRO_JOFFLONG_X1_PLT 16
+#define R_TILEPRO_IMM8_X0 17
+#define R_TILEPRO_IMM8_Y0 18
+#define R_TILEPRO_IMM8_X1 19
+#define R_TILEPRO_IMM8_Y1 20
+#define R_TILEPRO_MT_IMM15_X1 21
+#define R_TILEPRO_MF_IMM15_X1 22
+#define R_TILEPRO_IMM16_X0 23
+#define R_TILEPRO_IMM16_X1 24
+#define R_TILEPRO_IMM16_X0_LO 25
+#define R_TILEPRO_IMM16_X1_LO 26
+#define R_TILEPRO_IMM16_X0_HI 27
+#define R_TILEPRO_IMM16_X1_HI 28
+#define R_TILEPRO_IMM16_X0_HA 29
+#define R_TILEPRO_IMM16_X1_HA 30
+#define R_TILEPRO_IMM16_X0_PCREL 31
+#define R_TILEPRO_IMM16_X1_PCREL 32
+#define R_TILEPRO_IMM16_X0_LO_PCREL 33
+#define R_TILEPRO_IMM16_X1_LO_PCREL 34
+#define R_TILEPRO_IMM16_X0_HI_PCREL 35
+#define R_TILEPRO_IMM16_X1_HI_PCREL 36
+#define R_TILEPRO_IMM16_X0_HA_PCREL 37
+#define R_TILEPRO_IMM16_X1_HA_PCREL 38
+#define R_TILEPRO_IMM16_X0_GOT 39
+#define R_TILEPRO_IMM16_X1_GOT 40
+#define R_TILEPRO_IMM16_X0_GOT_LO 41
+#define R_TILEPRO_IMM16_X1_GOT_LO 42
+#define R_TILEPRO_IMM16_X0_GOT_HI 43
+#define R_TILEPRO_IMM16_X1_GOT_HI 44
+#define R_TILEPRO_IMM16_X0_GOT_HA 45
+#define R_TILEPRO_IMM16_X1_GOT_HA 46
+#define R_TILEPRO_MMSTART_X0 47
+#define R_TILEPRO_MMEND_X0 48
+#define R_TILEPRO_MMSTART_X1 49
+#define R_TILEPRO_MMEND_X1 50
+#define R_TILEPRO_SHAMT_X0 51
+#define R_TILEPRO_SHAMT_X1 52
+#define R_TILEPRO_SHAMT_Y0 53
+#define R_TILEPRO_SHAMT_Y1 54
+#define R_TILEPRO_DEST_IMM8_X1 55
+/* Relocs 56-65 are currently not defined. */
+#define R_TILEPRO_IMM16_X0_TLS_GD 66
+#define R_TILEPRO_IMM16_X1_TLS_GD 67
+#define R_TILEPRO_IMM16_X0_TLS_GD_LO 68
+#define R_TILEPRO_IMM16_X1_TLS_GD_LO 69
+#define R_TILEPRO_IMM16_X0_TLS_GD_HI 70
+#define R_TILEPRO_IMM16_X1_TLS_GD_HI 71
+#define R_TILEPRO_IMM16_X0_TLS_GD_HA 72
+#define R_TILEPRO_IMM16_X1_TLS_GD_HA 73
+#define R_TILEPRO_IMM16_X0_TLS_IE 74
+#define R_TILEPRO_IMM16_X1_TLS_IE 75
+#define R_TILEPRO_IMM16_X0_TLS_IE_LO 76
+#define R_TILEPRO_IMM16_X1_TLS_IE_LO 77
+#define R_TILEPRO_IMM16_X0_TLS_IE_HI 78
+#define R_TILEPRO_IMM16_X1_TLS_IE_HI 79
+#define R_TILEPRO_IMM16_X0_TLS_IE_HA 80
+#define R_TILEPRO_IMM16_X1_TLS_IE_HA 81
+#define R_TILEPRO_TLS_DTPMOD32 82
+#define R_TILEPRO_TLS_DTPOFF32 83
+#define R_TILEPRO_TLS_TPOFF32 84
+
+
+#define R_TILEPRO_GNU_VTINHERIT 128
+#define R_TILEPRO_GNU_VTENTRY 129
+
+#define R_TILEPRO_NUM 130
+
+
+/* TILE-Gx relocations. */
+#define R_TILEGX_NONE 0
+#define R_TILEGX_64 1
+#define R_TILEGX_32 2
+#define R_TILEGX_16 3
+#define R_TILEGX_8 4
+#define R_TILEGX_64_PCREL 5
+#define R_TILEGX_32_PCREL 6
+#define R_TILEGX_16_PCREL 7
+#define R_TILEGX_8_PCREL 8
+#define R_TILEGX_HW0 9
+#define R_TILEGX_HW1 10
+#define R_TILEGX_HW2 11
+#define R_TILEGX_HW3 12
+#define R_TILEGX_HW0_LAST 13
+#define R_TILEGX_HW1_LAST 14
+#define R_TILEGX_HW2_LAST 15
+#define R_TILEGX_COPY 16
+#define R_TILEGX_GLOB_DAT 17
+#define R_TILEGX_JMP_SLOT 18
+#define R_TILEGX_RELATIVE 19
+#define R_TILEGX_BROFF_X1 20
+#define R_TILEGX_JUMPOFF_X1 21
+#define R_TILEGX_JUMPOFF_X1_PLT 22
+#define R_TILEGX_IMM8_X0 23
+#define R_TILEGX_IMM8_Y0 24
+#define R_TILEGX_IMM8_X1 25
+#define R_TILEGX_IMM8_Y1 26
+#define R_TILEGX_DEST_IMM8_X1 27
+#define R_TILEGX_MT_IMM14_X1 28
+#define R_TILEGX_MF_IMM14_X1 29
+#define R_TILEGX_MMSTART_X0 30
+#define R_TILEGX_MMEND_X0 31
+#define R_TILEGX_SHAMT_X0 32
+#define R_TILEGX_SHAMT_X1 33
+#define R_TILEGX_SHAMT_Y0 34
+#define R_TILEGX_SHAMT_Y1 35
+#define R_TILEGX_IMM16_X0_HW0 36
+#define R_TILEGX_IMM16_X1_HW0 37
+#define R_TILEGX_IMM16_X0_HW1 38
+#define R_TILEGX_IMM16_X1_HW1 39
+#define R_TILEGX_IMM16_X0_HW2 40
+#define R_TILEGX_IMM16_X1_HW2 41
+#define R_TILEGX_IMM16_X0_HW3 42
+#define R_TILEGX_IMM16_X1_HW3 43
+#define R_TILEGX_IMM16_X0_HW0_LAST 44
+#define R_TILEGX_IMM16_X1_HW0_LAST 45
+#define R_TILEGX_IMM16_X0_HW1_LAST 46
+#define R_TILEGX_IMM16_X1_HW1_LAST 47
+#define R_TILEGX_IMM16_X0_HW2_LAST 48
+#define R_TILEGX_IMM16_X1_HW2_LAST 49
+#define R_TILEGX_IMM16_X0_HW0_PCREL 50
+#define R_TILEGX_IMM16_X1_HW0_PCREL 51
+#define R_TILEGX_IMM16_X0_HW1_PCREL 52
+#define R_TILEGX_IMM16_X1_HW1_PCREL 53
+#define R_TILEGX_IMM16_X0_HW2_PCREL 54
+#define R_TILEGX_IMM16_X1_HW2_PCREL 55
+#define R_TILEGX_IMM16_X0_HW3_PCREL 56
+#define R_TILEGX_IMM16_X1_HW3_PCREL 57
+#define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58
+#define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59
+#define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60
+#define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61
+#define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62
+#define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63
+#define R_TILEGX_IMM16_X0_HW0_GOT 64
+#define R_TILEGX_IMM16_X1_HW0_GOT 65
+#define R_TILEGX_IMM16_X0_HW1_GOT 66
+#define R_TILEGX_IMM16_X1_HW1_GOT 67
+#define R_TILEGX_IMM16_X0_HW2_GOT 68
+#define R_TILEGX_IMM16_X1_HW2_GOT 69
+#define R_TILEGX_IMM16_X0_HW3_GOT 70
+#define R_TILEGX_IMM16_X1_HW3_GOT 71
+#define R_TILEGX_IMM16_X0_HW0_LAST_GOT 72
+#define R_TILEGX_IMM16_X1_HW0_LAST_GOT 73
+#define R_TILEGX_IMM16_X0_HW1_LAST_GOT 74
+#define R_TILEGX_IMM16_X1_HW1_LAST_GOT 75
+#define R_TILEGX_IMM16_X0_HW2_LAST_GOT 76
+#define R_TILEGX_IMM16_X1_HW2_LAST_GOT 77
+#define R_TILEGX_IMM16_X0_HW0_TLS_GD 78
+#define R_TILEGX_IMM16_X1_HW0_TLS_GD 79
+#define R_TILEGX_IMM16_X0_HW1_TLS_GD 80
+#define R_TILEGX_IMM16_X1_HW1_TLS_GD 81
+#define R_TILEGX_IMM16_X0_HW2_TLS_GD 82
+#define R_TILEGX_IMM16_X1_HW2_TLS_GD 83
+#define R_TILEGX_IMM16_X0_HW3_TLS_GD 84
+#define R_TILEGX_IMM16_X1_HW3_TLS_GD 85
+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD 86
+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD 87
+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD 88
+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD 89
+#define R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD 90
+#define R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD 91
+#define R_TILEGX_IMM16_X0_HW0_TLS_IE 92
+#define R_TILEGX_IMM16_X1_HW0_TLS_IE 93
+#define R_TILEGX_IMM16_X0_HW1_TLS_IE 94
+#define R_TILEGX_IMM16_X1_HW1_TLS_IE 95
+#define R_TILEGX_IMM16_X0_HW2_TLS_IE 96
+#define R_TILEGX_IMM16_X1_HW2_TLS_IE 97
+#define R_TILEGX_IMM16_X0_HW3_TLS_IE 98
+#define R_TILEGX_IMM16_X1_HW3_TLS_IE 99
+#define R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE 100
+#define R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE 101
+#define R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE 102
+#define R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE 103
+#define R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE 104
+#define R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE 105
+#define R_TILEGX_TLS_DTPMOD64 106
+#define R_TILEGX_TLS_DTPOFF64 107
+#define R_TILEGX_TLS_TPOFF64 108
+#define R_TILEGX_TLS_DTPMOD32 109
+#define R_TILEGX_TLS_DTPOFF32 110
+#define R_TILEGX_TLS_TPOFF32 111
+
+#define R_TILEGX_GNU_VTINHERIT 128
+#define R_TILEGX_GNU_VTENTRY 129
+
+#define R_TILEGX_NUM 130
+
+
__END_DECLS
#endif /* elf.h */
diff --git a/elf/stackguard-macros.h b/elf/stackguard-macros.h
index 97db8bc..dbb1ddb 100644
--- a/elf/stackguard-macros.h
+++ b/elf/stackguard-macros.h
@@ -27,6 +27,12 @@
#elif defined __ia64__
# define STACK_CHK_GUARD \
({ uintptr_t x; asm ("adds %0 = -8, r13;; ld8 %0 = [%0]" : "=r" (x)); x; })
+#elif defined __tilegx__
+# define STACK_CHK_GUARD \
+ ({ uintptr_t x; asm ("addi %0, tp, -16; ld %0, %0" : "=r" (x)); x; })
+#elif defined __tilepro__
+# define STACK_CHK_GUARD \
+ ({ uintptr_t x; asm ("addi %0, tp, -8; lw %0, %0" : "=r" (x)); x; })
#else
extern uintptr_t __stack_chk_guard;
# define STACK_CHK_GUARD __stack_chk_guard
diff --git a/scripts/check-local-headers.sh b/scripts/check-local-headers.sh
index 62831dd..3fcf859 100755
--- a/scripts/check-local-headers.sh
+++ b/scripts/check-local-headers.sh
@@ -29,7 +29,7 @@ exec ${AWK} -v includedir="$includedir" '
BEGIN {
status = 0
exclude = "^" includedir \
- "/(asm[-/]|linux/|selinux/|gd|nss3/|sys/capability\\.h|libaudit\\.h)"
+ "/(asm[-/]|arch|linux/|selinux/|gd|nss3/|sys/capability\\.h|libaudit\\.h)"
}
/^[^ ]/ && $1 ~ /.*:/ { obj = $1 }
{