PATCH: Define LP_SIZE/LP_OP/ASM_ADDR/RXX_LP for x86-64

["H.J. Lu" <hongjiu dot lu at intel dot com>]

Hi,

X32 and x86-64 share the same assembly codes as well as C codes with
inline asm statements.  When dealing with longs and pointers in assembly
codes or inline asm statements, we need to use proper register names,
64-bit register for x86-64 and 32-bit register for x32, as well as
proper size for longs and pointers.  In assembly code, we don't need
the `q' instruction suffix if there is a register operand.  We just
need to use the proper register and assembler will take care of it.  But
there is no register operand, we must use the proper instruction suffix,
`q' for x86-64 and `l' for x32.  Also to take the address of symbol, foo,
x86-64 uses

	.quad  foo

x32 uses

	.long foo

This patch defines

1. LP_SIZE: Size of long and pointer.
2. LP_OP(insn): Add the proper instruction suffix to "insn".
3. ASM_ADDR: Assembly directive to take the address of symbol.
4. RXX_LP: Register used for long and pointer.

Tested on Linux/x32 and Linux/x86-64.  OK to install?

I really appreciate commnts on this patch since rest of x32 patches use
those macros.

Thanks.

H.J.
---
	* sysdeps/x86_64/sysdep.h (LP_SIZE): New macro.
	(LP_OP): Likewise.
	(ASM_ADDR): Likewise.
	(RAX_LP): Likewise.
	(RBP_LP): Likewise.
	(RBX_LP): Likewise.
	(RCX_LP): Likewise.
	(RDI_LP): Likewise.
	(RSI_LP): Likewise.
	(RSP_LP): Likewise.
	(R8_LP): Likewise.
	(R9_LP): Likewise.
	(R10_LP): Likewise.
	(R10_LP): Likewise.
	(R11_LP): Likewise.
	(R12_LP): Likewise.
	(R13_LP): Likewise.
	(R14_LP): Likewise.
	(R15_LP): Likewise.
 
diff --git a/sysdeps/x86_64/sysdep.h b/sysdeps/x86_64/sysdep.h
index e455c60..e34d7a9 100644
--- a/sysdeps/x86_64/sysdep.h
+++ b/sysdeps/x86_64/sysdep.h
@@ -95,4 +95,60 @@ lose:									      \
 
 #define atom_text_section .section ".text.atom", "ax"
 
+/* Long and pointer size in bytes.  */
+#define LP_SIZE	8
+
+/* Instruction to operate on long and pointer.  */
+#define LP_OP(insn) insn##q
+
+/* Assembler address directive. */
+#define ASM_ADDR .quad
+
+/* Registers to hold long and pointer.  */
+#define RAX_LP	rax
+#define RBP_LP	rbp
+#define RBX_LP	rbx
+#define RCX_LP	rcx
+#define RDI_LP	rdi
+#define RDX_LP	rdx
+#define RSI_LP	rsi
+#define RSP_LP	rsp
+#define R8_LP	r8
+#define R9_LP	r9
+#define R10_LP	r10
+#define R11_LP	r11
+#define R12_LP	r12
+#define R13_LP	r13
+#define R14_LP	r14
+#define R15_LP	r15
+
+#else	/* __ASSEMBLER__ */
+
+/* Long and pointer size in bytes.  */
+#define LP_SIZE "8"
+
+/* Instruction to operate on long and pointer.  */
+#define LP_OP(insn) #insn "q"
+
+/* Assembler address directive. */
+#define ASM_ADDR ".quad"
+
+/* Registers to hold long and pointer.  */
+#define RAX_LP	"rax"
+#define RBP_LP	"rbp"
+#define RBX_LP	"rbx"
+#define RCX_LP	"rcx"
+#define RDI_LP	"rdi"
+#define RDX_LP	"rdx"
+#define RSI_LP	"rsi"
+#define RSP_LP	"rsp"
+#define R8_LP	"r8"
+#define R9_LP	"r9"
+#define R10_LP	"r10"
+#define R11_LP	"r11"
+#define R12_LP	"r12"
+#define R13_LP	"r13"
+#define R14_LP	"r14"
+#define R15_LP	"r15"
+
 #endif	/* __ASSEMBLER__ */