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Re: [PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.
- From: Dmitrieva Liubov <liubov dot dmitrieva at gmail dot com>
- To: Andreas Schwab <schwab at suse dot de>, Ondrej Bilka <neleai at seznam dot cz>
- Cc: libc-alpha at sourceware dot org
- Date: Mon, 17 Jun 2013 19:52:12 +0400
- Subject: Re: [PATCH] Don't use SSE4_2 instructions on Intel Silvermont Micro Architecture.
- References: <CAHjhQ93=uegeZg9iTqoJ+PFuUrvn8e2mA8tZ96Jy4CaV6aPbWg at mail dot gmail dot com> <mvma9mopwp6 dot fsf at hawking dot suse dot de>
I tested with ~, there was a misprint.
+ __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx &= ~bit_SSE4_2;
I'm not sure that I checked all the functions where there is SSE4_2
version. I will look at strspn/strcspn/strpbr.
Thanks.
--
Liubov Dmitrieva
On Mon, Jun 17, 2013 at 7:45 PM, Andreas Schwab <schwab@suse.de> wrote:
> Dmitrieva Liubov <liubov.dmitrieva@gmail.com> writes:
>
>> + __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx &= !bit_SSE4_2;
>
> That obviously won't do the right thing. How did you test it?
>
> Andreas.
>
> --
> Andreas Schwab, SUSE Labs, schwab@suse.de
> GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
> "And now for something completely different."