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patch: ia64/inline_syscall


Hi

Here's a patch for an INLINE_SYSCALL() implementation for the ia64.

It seems to work fine here.

Jes

2001-03-13  Jes Sorensen  <jes@linuxcare.com>

	* sysdeps/unix/sysv/linux/ia64/sysdep.h (INLINE_SYSCALL): ia64
	implementation, partly by Richard Henderson.


--- /home/jes/cygnus/libc-2.2-110301/sysdeps/unix/sysv/linux/ia64/sysdep.h	Fri Sep 29 12:43:57 2000
+++ sysdeps/unix/sysv/linux/ia64/sysdep.h	Tue Mar 13 15:45:04 2001
@@ -101,9 +101,64 @@
 
 /* Define a macro which expands into the inline wrapper code for a system
    call.  */
-#if 0
 #undef INLINE_SYSCALL
-#define INLINE_SYSCALL(name, nr, args...)	__##name (args)
-#endif
+#define INLINE_SYSCALL(name, nr, args...)			\
+  ({								\
+     register long _r8 asm ("r8");				\
+     register long _r10 asm ("r10");				\
+     register long _r15 asm ("r15") = __NR_##name;		\
+     LOAD_ARGS_##nr (args);					\
+     asm volatile ("break %3"					\
+                   : "=r" (_r8), "=r" (_r10), "=r"(_r15)	\
+                   : "i" (__BREAK_SYSCALL),			\
+		     "r" (_r15) ASM_ARGS_##nr			\
+                   : "memory" ASM_CLOBBERS_##nr);		\
+     if (_r10 == (long) -1)					\
+       {							\
+         __set_errno (-_r8);					\
+         _r8 = (long) -1;					\
+       }							\
+     (int) _r8; })
+
+#define LOAD_ARGS_0()   do { } while (0)
+#define LOAD_ARGS_1(out0)				\
+  register long _out0 asm ("out0") = (long) (out0);	\
+  LOAD_ARGS_0 ()
+#define LOAD_ARGS_2(out0, out1)				\
+  register long _out1 asm ("out1") = (long) (out1);	\
+  LOAD_ARGS_1 (out0)
+#define LOAD_ARGS_3(out0, out1, out2)			\
+  register long _out2 asm ("out2") = (long) (out2);	\
+  LOAD_ARGS_2 (out0, out1)
+#define LOAD_ARGS_4(out0, out1, out2, out3)		\
+  register long _out3 asm ("out3") = (long) (out3);	\
+  LOAD_ARGS_3 (out0, out1, out2)
+#define LOAD_ARGS_5(out0, out1, out2, out3, out4)	\
+  register long _out4 asm ("out4") = (long) (out4);	\
+  LOAD_ARGS_4 (out0, out1, out2, out3)
+
+#define ASM_ARGS_0
+#define ASM_ARGS_1      ASM_ARGS_0, "r" (_out0)
+#define ASM_ARGS_2      ASM_ARGS_1, "r" (_out1)
+#define ASM_ARGS_3      ASM_ARGS_2, "r" (_out2)
+#define ASM_ARGS_4      ASM_ARGS_3, "r" (_out3)
+#define ASM_ARGS_5      ASM_ARGS_4, "r" (_out4)
+
+#define ASM_CLOBBERS_0	ASM_CLOBBERS_1, "out0"
+#define ASM_CLOBBERS_1	ASM_CLOBBERS_2, "out1"
+#define ASM_CLOBBERS_2	ASM_CLOBBERS_3, "out2"
+#define ASM_CLOBBERS_3	ASM_CLOBBERS_4, "out3"
+#define ASM_CLOBBERS_4	ASM_CLOBBERS_5, "out4"
+#define ASM_CLOBBERS_5	, "out5", "out6", "out7",			\
+  /* Non-stacked integer registers, minus r8, r10, r15.  */		\
+  "r2", "r3", "r9", "r11", "r12", "r13", "r14", "r16", "r17", "r18",	\
+  "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27",	\
+  "r28", "r29", "r30", "r31",						\
+  /* Predicate registers.  */						\
+  "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",	\
+  /* Non-rotating fp registers.  */					\
+  "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",	\
+  /* Branch registers.  */						\
+  "b6", "b7"
 
 #endif /* not __ASSEMBLER__ */


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