Make soft-float ARM use soft-fp fma/fmaf

["Joseph S. Myers" <joseph at codesourcery dot com>]

I've committed this patch to make soft-float ARM glibc use the soft-fp
versions of fma/fmaf, instead of the versions that rely on rounding
modes and exceptions that aren't supported for ARM soft-float and so
produce inaccurate results (even in round-to-nearest, the only
rounding mode that otherwise works properly for ARM soft-float).

(The sfp-machine.h doesn't attempt any run-time integration with
hardware exceptions and rounding modes if present, as there doesn't
seem to be much point without a proper fix for bug 10064 to make
libgcc __aeabi_* functions respect rounding modes and exceptions via
STT_GNU_IFUNC if VFP hardware is present.)

2013-07-02  Joseph Myers  <joseph@codesourcery.com>

	[BZ #13304]
	* sysdeps/arm/s_fma.c: New file.
	* sysdeps/arm/s_fmaf.c: New file.
	* sysdeps/arm/soft-fp/sfp-machine.h: New file.  Based on powerpc
	version.
	* sysdeps/arm/Implies: Add arm/soft-fp.

diff --git a/ports/sysdeps/arm/Implies b/ports/sysdeps/arm/Implies
index 780c4e2..10bd93a 100644
--- a/ports/sysdeps/arm/Implies
+++ b/ports/sysdeps/arm/Implies
@@ -1,3 +1,4 @@
+arm/soft-fp
 wordsize-32
 ieee754/flt-32
 ieee754/dbl-64
diff --git a/ports/sysdeps/arm/s_fma.c b/ports/sysdeps/arm/s_fma.c
new file mode 100644
index 0000000..dc4e27b
--- /dev/null
+++ b/ports/sysdeps/arm/s_fma.c
@@ -0,0 +1,5 @@
+#ifdef __SOFTFP__
+# include <soft-fp/fmadf4.c>
+#else
+# include <sysdeps/ieee754/dbl-64/s_fma.c>
+#endif
diff --git a/ports/sysdeps/arm/s_fmaf.c b/ports/sysdeps/arm/s_fmaf.c
new file mode 100644
index 0000000..550d8b8
--- /dev/null
+++ b/ports/sysdeps/arm/s_fmaf.c
@@ -0,0 +1,5 @@
+#ifdef __SOFTFP__
+# include <soft-fp/fmasf4.c>
+#else
+# include <sysdeps/ieee754/dbl-64/s_fmaf.c>
+#endif
diff --git a/ports/sysdeps/arm/soft-fp/sfp-machine.h b/ports/sysdeps/arm/soft-fp/sfp-machine.h
new file mode 100644
index 0000000..eba6e35
--- /dev/null
+++ b/ports/sysdeps/arm/soft-fp/sfp-machine.h
@@ -0,0 +1,49 @@
+#define _FP_W_TYPE_SIZE		32
+#define _FP_W_TYPE		unsigned long
+#define _FP_WS_TYPE		signed long
+#define _FP_I_TYPE		long
+
+#define _FP_MUL_MEAT_S(R,X,Y)				\
+  _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_D(R,X,Y)				\
+  _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_Q(R,X,Y)				\
+  _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_MUL_MEAT_DW_S(R,X,Y)				\
+  _FP_MUL_MEAT_DW_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_DW_D(R,X,Y)				\
+  _FP_MUL_MEAT_DW_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
+#define _FP_MUL_MEAT_DW_Q(R,X,Y)				\
+  _FP_MUL_MEAT_DW_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
+
+#define _FP_DIV_MEAT_S(R,X,Y)	_FP_DIV_MEAT_1_loop(S,R,X,Y)
+#define _FP_DIV_MEAT_D(R,X,Y)	_FP_DIV_MEAT_2_udiv(D,R,X,Y)
+#define _FP_DIV_MEAT_Q(R,X,Y)	_FP_DIV_MEAT_4_udiv(Q,R,X,Y)
+
+#define _FP_NANFRAC_S		((_FP_QNANBIT_S << 1) - 1)
+#define _FP_NANFRAC_D		((_FP_QNANBIT_D << 1) - 1), -1
+#define _FP_NANFRAC_Q		((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
+#define _FP_NANSIGN_S		0
+#define _FP_NANSIGN_D		0
+#define _FP_NANSIGN_Q		0
+
+#define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
+
+/* Someone please check this.  */
+#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)			\
+  do {								\
+    if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)		\
+	&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs))	\
+      {								\
+	R##_s = Y##_s;						\
+	_FP_FRAC_COPY_##wc(R,Y);				\
+      }								\
+    else							\
+      {								\
+	R##_s = X##_s;						\
+	_FP_FRAC_COPY_##wc(R,X);				\
+      }								\
+    R##_c = FP_CLS_NAN;						\
+  } while (0)

-- 
Joseph S. Myers
joseph@codesourcery.com