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[PATCH]: Fix libgloss port for 68hc11/68hc12
- From: Stephane Carrez <stcarrez at nerim dot fr>
- To: newlib at sources dot redhat dot com
- Date: Wed, 24 Jul 2002 00:34:57 +0200
- Subject: [PATCH]: Fix libgloss port for 68hc11/68hc12
Hi!
This is a revised patch for 68HC11/68HC12 support in libgloss.
I cleaned up and improved the port according to other ports.
It does not use the libgloss read/write and provide its own.
Can you integrate this patch ?
Stephane
2002-07-23 Stephane Carrez <stcarrez@nerim.fr>
* README: Mention 68HC11/68HC12 support.
* configure.in: Recognize m6811-elf and m6812-elf.
* m68hc11/Makefile.in: New file.
* m68hc11/configure.in: New file.
* m68hc11/configure: Generate.
* m68hc11/crt0.S: New file.
* m68hc11/sci-inout.S: New file for 68hc11/68hc12 sio.
* m68hc11/sim-valid-m68hc11.ld: New file.
* m68hc11/sim-valid-m68hc12.ld: New file.
* m68hc11/syscalls.c: New file.
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/README newlib-main-integrate/libgloss/README
--- newlib-main/libgloss/README Fri Mar 17 23:48:49 2000
+++ newlib-main-integrate/libgloss/README Wed Jul 17 00:28:02 2002
@@ -1,5 +1,6 @@
sparc - Fujitsu Sparclite board. Works on the ex930, ex931, ex933
hp74x - Hewlett Packard HP742 board. Also some support for the hp743.
+m68hc11 - Motorola 68HC11 or 68HC12 support.
m68k - Motorola MVME135 and IDP board. For CPU32 systems.
pa - WinBond and Oki boards with a PA.
mips - R3000 support. Array Tech LSI33k based RAID disk controller.
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/configure.in newlib-main-integrate/libgloss/configure.in
--- newlib-main/libgloss/configure.in Tue Jun 18 23:41:22 2002
+++ newlib-main-integrate/libgloss/configure.in Sat Jul 13 15:23:34 2002
@@ -34,6 +34,9 @@ case "${target}" in
m32r-*-*)
configdirs="${configdirs} m32r testsuite"
;;
+ m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*)
+ configdirs="m68hc11 testsuite"
+ ;;
m68*-*-*)
configdirs="${configdirs} m68k testsuite"
;;
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/Makefile.in newlib-main-integrate/libgloss/m68hc11/Makefile.in
--- newlib-main/libgloss/m68hc11/Makefile.in Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/Makefile.in Sat Jul 20 00:55:50 2002
@@ -0,0 +1,175 @@
+# Copyright (c) 1995, 1996, 1997 Cygnus Support
+# Copyright (c) 1999, 2000, 2001, 2002 Stephane Carrez
+#
+# The authors hereby grant permission to use, copy, modify, distribute,
+# and license this software and its documentation for any purpose, provided
+# that existing copyright notices are retained in all copies and that this
+# notice is included verbatim in any distributions. No written agreement,
+# license, or royalty fee is required for any of the authorized uses.
+# Modifications to this software may be copyrighted by their authors
+# and need not follow the licensing terms described here, provided that
+# the new terms are clearly indicated on the first page of each file where
+# they apply.
+#
+# This currently works with Motorola's 68HC11 based target boards.
+# (should work with 68HC12 but not tested yet)
+
+srcdir = @srcdir@
+objdir = .
+srcroot = $(srcdir)/../..
+objroot = $(objdir)/../..
+
+VPATH = $(srcdir) $(srcdir)/..
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+
+host_alias = @host_alias@
+target_alias = @target_alias@
+program_transform_name = @program_transform_name@
+
+bindir = @bindir@
+libdir = @libdir@
+tooldir = $(exec_prefix)/$(target_alias)
+
+# Multilib support variables.
+# TOP is used instead of MULTI{BUILD,SRC}TOP.
+MULTIDIRS =
+MULTISUBDIR =
+MULTIDO = true
+MULTICLEAN = true
+
+INSTALL = @INSTALL@
+INSTALL_PROGRAM = @INSTALL_PROGRAM@
+INSTALL_DATA = @INSTALL_DATA@
+
+SHELL = /bin/sh
+
+CC = @CC@
+
+AS = @AS@
+AR = @AR@
+LD = @LD@
+RANLIB = @RANLIB@
+AR_FLAGS = qv
+
+OBJDUMP = `if [ -f ${objroot}/../binutils/objdump ] ; \
+ then echo ${objroot}/../binutils/objdump ; \
+ else t='$(program_transform_name)'; echo objdump | sed -e $$t ; fi`
+OBJCOPY = `if [ -f ${objroot}/../binutils/objcopy ] ; \
+ then echo ${objroot}/../binutils/objcopy ; \
+ else t='$(program_transform_name)'; echo objcopy | sed -e $$t ; fi`
+
+SCRIPTS = sim-valid
+
+OBJS = syscalls.o close.o fstat.o getpid.o isatty.o kill.o \
+ lseek.o open.o print.o stat.o \
+ unlink.o sci-inout.o
+
+CFLAGS =
+
+CRT0 = crt0.o
+
+#
+# here's all the generic target stuff
+#
+GEN_LDFLAGS= -L${srcdir}
+BSP= libbcc.a
+
+# Host specific makefile fragment comes in here.
+@host_makefile_frag@
+
+#
+# build a test program for each target board. Just trying to get
+# it to link is a good test, so we ignore all the errors for now.
+#
+all: ${CRT0} ${BSP}
+
+#
+# here's where we build the board support packages for each target
+#
+${BSP}: $(OBJS)
+ ${AR} ${ARFLAGS} $@ $(OBJS)
+ ${RANLIB} $@
+
+
+syscalls.o: $(srcdir)/syscalls.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+close.o: $(srcdir)/../close.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+fstat.o: $(srcdir)/../fstat.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+getpid.o: $(srcdir)/../getpid.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+isatty.o: $(srcdir)/../isatty.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+kill.o: $(srcdir)/../kill.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+lseek.o: $(srcdir)/../lseek.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+open.o: $(srcdir)/../open.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+print.o: $(srcdir)/../print.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+putnum.o: $(srcdir)/../putnum.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+stat.o: $(srcdir)/../stat.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+unlink.o: $(srcdir)/../unlink.c
+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $<
+
+
+.PHONY: install info dvi doc install-info clean-info
+
+clean mostlyclean:
+ rm -f a.out core *.[oais] *-test *.srec *.dis *.x syscall.h
+
+distclean maintainer-clean realclean: clean
+ rm -f Makefile config.status *~
+
+.PHONY: install info install-info clean-info
+install: install-scripts
+ $(INSTALL_PROGRAM) $(CRT0) $(tooldir)/lib${MULTISUBDIR}/$(CRT0)
+ @for bsp in ${BSP}; do\
+ $(INSTALL_PROGRAM) $${bsp} $(tooldir)/lib${MULTISUBDIR}; \
+ done
+
+# Install the linker script in the correct place.
+install-scripts:
+ if [ -f ${objroot}/../binutils/objdump ] ; then \
+ objdump="${objroot}/../binutils/objdump"; \
+ else \
+ t='$(program_transform_name)'; \
+ objdump=`echo objdump | sed -e $$t`; \
+ fi ; \
+ name=`$$objdump -f $(CRT0) | sed '/^$$/d'`; \
+ case $$name in \
+ *elf32-m68hc11*) \
+ $(INSTALL_DATA) ${srcdir}/sim-valid-m68hc11.ld $(tooldir)/lib${MULTISUBDIR}/sim-valid.ld \
+ ;; \
+ *elf32-m68hc12*) \
+ $(INSTALL_DATA) ${srcdir}/sim-valid-m68hc12.ld $(tooldir)/lib${MULTISUBDIR}/sim-valid.ld \
+ ;; \
+ esac
+
+doc:
+info:
+install-info:
+clean-info:
+
+Makefile: Makefile.in config.status @host_makefile_frag_path@
+ $(SHELL) config.status
+
+config.status: configure
+ $(SHELL) config.status --recheck
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/configure.in newlib-main-integrate/libgloss/m68hc11/configure.in
--- newlib-main/libgloss/m68hc11/configure.in Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/configure.in Sat Jul 13 15:23:34 2002
@@ -0,0 +1,91 @@
+dnl Process this file with autoconf to produce a configure script.
+AC_PREREQ(2.5)dnl
+AC_INIT(sci-inout.S)
+
+if test "${enable_shared}" = "yes" ; then
+ echo "Shared libraries not supported for cross compiling, ignored"
+fi
+
+if test "$srcdir" = "." ; then
+ if test "${with_target_subdir}" != "." ; then
+ libgloss_topdir="${srcdir}/${with_multisrctop}../../.."
+ else
+ libgloss_topdir="${srcdir}/${with_multisrctop}../.."
+ fi
+else
+ libgloss_topdir="${srcdir}/../.."
+fi
+AC_CONFIG_AUX_DIR($libgloss_topdir)
+
+AC_CANONICAL_SYSTEM
+AC_ARG_PROGRAM
+
+AC_PROG_INSTALL
+
+# FIXME: We temporarily define our own version of AC_PROG_CC. This is
+# copied from autoconf 2.12, but does not call AC_PROG_CC_WORKS. We
+# are probably using a cross compiler, which will not be able to fully
+# link an executable. This should really be fixed in autoconf
+# itself.
+
+AC_DEFUN(LIB_AC_PROG_CC,
+[AC_BEFORE([$0], [AC_PROG_CPP])dnl
+AC_CHECK_PROG(CC, gcc, gcc)
+if test -z "$CC"; then
+ AC_CHECK_PROG(CC, cc, cc, , , /usr/ucb/cc)
+ test -z "$CC" && AC_MSG_ERROR([no acceptable cc found in \$PATH])
+fi
+
+AC_PROG_CC_GNU
+
+if test $ac_cv_prog_gcc = yes; then
+ GCC=yes
+dnl Check whether -g works, even if CFLAGS is set, in case the package
+dnl plays around with CFLAGS (such as to build both debugging and
+dnl normal versions of a library), tasteless as that idea is.
+ ac_test_CFLAGS="${CFLAGS+set}"
+ ac_save_CFLAGS="$CFLAGS"
+ CFLAGS=
+ AC_PROG_CC_G
+ if test "$ac_test_CFLAGS" = set; then
+ CFLAGS="$ac_save_CFLAGS"
+ elif test $ac_cv_prog_cc_g = yes; then
+ CFLAGS="-g -O2"
+ else
+ CFLAGS="-O2"
+ fi
+else
+ GCC=
+ test "${CFLAGS+set}" = set || CFLAGS="-g"
+fi
+])
+
+LIB_AC_PROG_CC
+
+AS=${AS-as}
+AC_SUBST(AS)
+AR=${AR-ar}
+AC_SUBST(AR)
+LD=${LD-ld}
+AC_SUBST(LD)
+AC_PROG_RANLIB
+
+host_makefile_frag=${srcdir}/../config/default.mh
+
+dnl We have to assign the same value to other variables because autoconf
+dnl doesn't provide a mechanism to substitute a replacement keyword with
+dnl arbitrary data or pathnames.
+dnl
+host_makefile_frag_path=$host_makefile_frag
+AC_SUBST(host_makefile_frag_path)
+AC_SUBST_FILE(host_makefile_frag)
+
+AC_OUTPUT(Makefile,
+. ${libgloss_topdir}/config-ml.in,
+srcdir=${srcdir}
+target=${target}
+ac_configure_args="${ac_configure_args} --enable-multilib"
+CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+libgloss_topdir=${libgloss_topdir}
+)
+
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/crt0.S newlib-main-integrate/libgloss/m68hc11/crt0.S
--- newlib-main/libgloss/m68hc11/crt0.S Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/crt0.S Sat Jul 13 15:23:34 2002
@@ -0,0 +1,69 @@
+/* Startup code for M68HC11/M68HC12.
+ * Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+;-----------------------------------------
+; startup code
+;-----------------------------------------
+ .file "crt0.s"
+
+;;
+;;
+;; The linker concatenate the .install* sections in the following order:
+;;
+;; .install0 Setup the stack pointer
+;; .install1 Place holder for applications
+;; .install2 Optional installation of data section in memory
+;; .install3 Place holder for applications
+;; .install4 Invokes the main
+;;
+ .sect .install0,"ax",@progbits
+ .globl _start
+
+_start:
+;;
+;; At this step, the stack is not initialized and interrupts are masked.
+;; Applications only have 64 cycles to initialize some registers.
+;;
+;; To have a generic/configurable startup, initialize the stack to
+;; the end of some memory region. The _stack symbol is defined by
+;; the linker.
+;;
+ lds #_stack
+
+ .sect .install2,"ax",@progbits
+;;
+;; Call a specific initialization operation. The default is empty.
+;; It can be overriden by applications. It is intended to initialize
+;; the 68hc11 registers. Function prototype is:
+;;
+;; int __premain(void);
+;;
+ jsr __premain
+
+;;
+;;
+;;
+ .sect .install4,"ax",@progbits
+ jsr main
+fatal:
+ jsr exit
+ bra fatal
+
+;-----------------------------------------
+; end startup code
+;-----------------------------------------
+;; Force loading of data section mapping and bss clear
+ .globl __map_data_section
+ .globl __init_bss_section
+
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/sci-inout.S newlib-main-integrate/libgloss/m68hc11/sci-inout.S
--- newlib-main/libgloss/m68hc11/sci-inout.S Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/sci-inout.S Sat Jul 13 15:23:34 2002
@@ -0,0 +1,134 @@
+/* M68HC11/M68HC12 serial line operations
+ * Copyright (C) 1999, 2001 Stephane Carrez (stcarrez@nerim.fr)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#ifdef mc68hc12
+ SC0CR1 = 0xC2
+ SC0CR2 = 0xC3
+ SC0SR1 = 0xC4
+ SC0DRL = 0xC7
+ SC0BD = 0xC0
+
+ .sect .data
+ .globl _m68hc12_ports
+_m68hc12_ports: .word 0
+
+ .sect .text
+ .globl outbyte
+;;;
+;;; int outbyte(char c);
+;;;
+;;; B : Character to send
+;;;
+outbyte:
+ bsr _sci_init
+L1:
+ ldaa SC0SR1,x
+ bge L1
+ stab SC0DRL,x
+ ldab SC0CR2,x
+ orab #0x8
+ stab SC0CR2,x
+ rts
+
+ .sect .text
+ .globl inbyte
+;;;
+;;; char inbyte(void);
+;;;
+inbyte:
+ bsr _sci_init
+ ldaa SC0SR1,x
+ bita #0x20
+ beq inbyte
+ ldab SC0CR2,x
+ rts
+
+ .globl _sci_init
+ .sect .text
+_sci_init:
+ ldx _m68hc12_ports
+ beq do_init
+ dex
+ rts
+do_init:
+ ldx #0x1
+ stx _m68hc12_ports
+ dex
+ ldd #26
+ std SC0BD,x
+ ldaa #0
+ staa SC0CR1,x
+ ldaa #0xC
+ staa SC0CR2,x
+ rts
+#else
+ BAUD = 0x2b
+ SCCR1= 0x2c
+ SCCR2= 0x2d
+ SCSR = 0x2e
+ SCDR = 0x2f
+
+ .sect .data
+ .globl _m68hc11_ports
+_m68hc11_ports: .word 0
+
+ .sect .text
+ .globl outbyte
+;;;
+;;; int outbyte(char c);
+;;;
+;;; B : Character to send
+;;;
+outbyte:
+ bsr _sci_init
+L1:
+ ldaa SCSR,x
+ bge L1
+ stab SCDR,x
+ ldab SCCR2,x
+ orab #0x8
+ stab SCCR2,x
+ rts
+
+ .sect .text
+ .globl inbyte
+;;;
+;;; char inbyte(void);
+;;;
+inbyte:
+ bsr _sci_init
+ ldaa SCSR,x
+ bita #0x20
+ beq inbyte
+ ldab SCDR,x
+ rts
+
+ .globl _sci_init
+ .sect .text
+_sci_init:
+ ldx _m68hc11_ports
+ beq do_init
+ rts
+do_init:
+ ldx #0x1000
+ stx _m68hc11_ports
+ ldaa #0x30
+ staa BAUD,x
+ clra
+ staa SCCR1,x
+ ldaa #0xC
+ staa SCCR2,x
+ rts
+
+#endif
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/sim-valid-m68hc11.ld newlib-main-integrate/libgloss/m68hc11/sim-valid-m68hc11.ld
--- newlib-main/libgloss/m68hc11/sim-valid-m68hc11.ld Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/sim-valid-m68hc11.ld Sat Jul 20 00:03:14 2002
@@ -0,0 +1,311 @@
+/* Linker script for 68HC11 executable (PROM). */
+ENTRY(_start)
+OUTPUT_FORMAT("elf32-m68hc11", "elf32-m68hc11", "elf32-m68hc11")
+OUTPUT_ARCH(m68hc11)
+
+GROUP(-lc -lbcc -lgcc)
+SEARCH_DIR(.);
+/* Fixed definition of the available memory banks.
+ See generic emulation script for a user defined configuration. */
+
+/* The memory layout below is suitable for gcc validation.
+ It takes care of big programs allowing up to 48128 bytes
+ of text while allowing some programs that consume some
+ memory (comp-goto-1 requires the RAM to be set to 0x4400
+ to avoid head<->stack collision in malloc/sbrk). */
+MEMORY
+{
+ page0 (rwx) : ORIGIN = 0x00, LENGTH = 256
+ text (rx) : ORIGIN = 0x04400, LENGTH = 0x10000 - 0x4400
+ data : ORIGIN = 0x01100, LENGTH = 0x2000 - 0x1100
+}
+/* Setup the stack on the top of the data memory bank. */
+PROVIDE (_stack = 0x04400 - 1);
+SECTIONS
+{
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .rel.text :
+ {
+ *(.rel.text)
+ *(.rel.text.*)
+ *(.rel.gnu.linkonce.t.*)
+ }
+ .rela.text :
+ {
+ *(.rela.text)
+ *(.rela.text.*)
+ *(.rela.gnu.linkonce.t.*)
+ }
+ .rel.data :
+ {
+ *(.rel.data)
+ *(.rel.data.*)
+ *(.rel.gnu.linkonce.d.*)
+ }
+ .rela.data :
+ {
+ *(.rela.data)
+ *(.rela.data.*)
+ *(.rela.gnu.linkonce.d.*)
+ }
+ .rel.rodata :
+ {
+ *(.rel.rodata)
+ *(.rel.rodata.*)
+ *(.rel.gnu.linkonce.r.*)
+ }
+ .rela.rodata :
+ {
+ *(.rela.rodata)
+ *(.rela.rodata.*)
+ *(.rela.gnu.linkonce.r.*)
+ }
+ .rel.sdata :
+ {
+ *(.rel.sdata)
+ *(.rel.sdata.*)
+ *(.rel.gnu.linkonce.s.*)
+ }
+ .rela.sdata :
+ {
+ *(.rela.sdata)
+ *(.rela.sdata.*)
+ *(.rela.gnu.linkonce.s.*)
+ }
+ .rel.sbss :
+ {
+ *(.rel.sbss)
+ *(.rel.sbss.*)
+ *(.rel.gnu.linkonce.sb.*)
+ }
+ .rela.sbss :
+ {
+ *(.rela.sbss)
+ *(.rela.sbss.*)
+ *(.rel.gnu.linkonce.sb.*)
+ }
+ .rel.bss :
+ {
+ *(.rel.bss)
+ *(.rel.bss.*)
+ *(.rel.gnu.linkonce.b.*)
+ }
+ .rela.bss :
+ {
+ *(.rela.bss)
+ *(.rela.bss.*)
+ *(.rela.gnu.linkonce.b.*)
+ }
+ .rela.stext : { *(.rela.stest) }
+ .rela.etext : { *(.rela.etest) }
+ .rela.sdata : { *(.rela.sdata) }
+ .rela.edata : { *(.rela.edata) }
+ .rela.eit_v : { *(.rela.eit_v) }
+ .rela.ebss : { *(.rela.ebss) }
+ .rela.srodata : { *(.rela.srodata) }
+ .rela.erodata : { *(.rela.erodata) }
+ .rela.got : { *(.rela.got) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rela.init : { *(.rela.init) }
+ .rela.fini : { *(.rela.fini) }
+ .rela.plt : { *(.rela.plt) }
+ .rel.stext : { *(.rel.stest) }
+ .rel.etext : { *(.rel.etest) }
+ .rel.sdata : { *(.rel.sdata) }
+ .rel.edata : { *(.rel.edata) }
+ .rel.ebss : { *(.rel.ebss) }
+ .rel.eit_v : { *(.rel.eit_v) }
+ .rel.srodata : { *(.rel.srodata) }
+ .rel.erodata : { *(.rel.erodata) }
+ .rel.got : { *(.rel.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rel.init : { *(.rel.init) }
+ .rel.fini : { *(.rel.fini) }
+ .rel.plt : { *(.rel.plt) }
+ /* Concatenate .page0 sections. Put them in the page0 memory bank
+ unless we are creating a relocatable file. */
+ .page0 :
+ {
+ *(.page0)
+ *(.softregs)
+ } > page0
+
+ /* Start of text section. */
+ .stext :
+ {
+ *(.stext)
+ } > text
+ .init :
+ {
+ *(.init)
+ } =0
+ .text :
+ {
+ /* Put startup code at beginning so that _start keeps same address. */
+ /* Startup code. */
+ *(.install0) /* Section should setup the stack pointer. */
+ *(.install1) /* Place holder for applications. */
+ *(.install2) /* Optional installation of data sections in RAM. */
+ *(.install3) /* Place holder for applications. */
+ *(.install4) /* Section that calls the main. */
+ *(.init)
+ *(.text)
+ *(.text.*)
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t.*)
+ /* Finish code. */
+ *(.fini0) /* Beginning of finish code (_exit symbol). */
+ *(.fini1) /* Place holder for applications. */
+ *(.fini2) /* C++ destructors. */
+ *(.fini3) /* Place holder for applications. */
+ *(.fini4) /* Runtime exit. */
+ _etext = .;
+ PROVIDE (etext = .);
+ } > text
+ .eh_frame :
+ {
+ *(.eh_frame)
+ } > text
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ } > text
+ .rodata1 :
+ {
+ *(.rodata1)
+ } > text
+ /* Constructor and destructor tables are in ROM. */
+ .ctors :
+ {
+ PROVIDE (__CTOR_LIST__ = .);
+ *(.ctors)
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors)) */
+ PROVIDE(__CTOR_END__ = .);
+ } > text
+ .dtors :
+ {
+ PROVIDE(__DTOR_LIST__ = .);
+ *(.dtors)
+ /*
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors)) */
+ PROVIDE(__DTOR_END__ = .);
+ } > text
+ /* Start of the data section image in ROM. */
+ __data_image = .;
+ PROVIDE (__data_image = .);
+ /* All read-only sections that normally go in PROM must be above.
+ We construct the DATA image section in PROM at end of all these
+ read-only sections. The data image must be copied at init time.
+ Refer to GNU ld, Section 3.6.8.2 Output Section LMA. */
+ .data : AT (__data_image)
+ {
+ __data_section_start = .;
+ PROVIDE (__data_section_start = .);
+ *(.sdata)
+ *(.data)
+ *(.data.*)
+ *(.data1)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ _edata = .;
+ PROVIDE (edata = .);
+ } > data
+ __data_section_size = SIZEOF(.data);
+ PROVIDE (__data_section_size = SIZEOF(.data));
+ __data_image_end = __data_image + __data_section_size;
+/* SCz: this does not work yet... This is supposed to force the loading
+ of _map_data.o (from libgcc.a) when the .data section is not empty.
+ By doing so, this should bring the code that copies the .data section
+ from ROM to RAM at init time.
+ ___pre_comp_data_size = SIZEOF(.data);
+ __install_data_sections = ___pre_comp_data_size > 0 ?
+ __map_data_sections : 0;
+*/
+ /* .install :
+ {
+ . = _data_image_end;
+ } > text */
+ /* Relocation for some bss and data sections. */
+ .bss :
+ {
+ __bss_start = .;
+ *(.sbss)
+ *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ PROVIDE (_end = .);
+ } > data
+ __bss_size = SIZEOF(.bss);
+ PROVIDE (__bss_size = SIZEOF(.bss));
+ /* If the 'vectors_addr' symbol is defined, it indicates the start address
+ of interrupt vectors. This depends on the 68HC11 operating mode:
+ Addr
+ Single chip 0xffc0
+ Extended mode 0xffc0
+ Bootstrap 0x00c0
+ Test 0xbfc0
+ In general, the vectors address is 0xffc0. This can be overriden
+ with the '-defsym vectors_addr=0xbfc0' ld option.
+ Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
+ they are redirected to 0x00c0 by the internal PROM. Application's vectors
+ must also consist of jump instructions (see Motorola's manual). */
+ PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
+ .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
+ {
+ *(.vectors)
+ }
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0.
+ Treatment of DWARF debug section must be at end of the linker
+ script to avoid problems when there are undefined symbols. It's necessary
+ to avoid that the DWARF section is relocated before such undefined
+ symbols are found. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+}
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/sim-valid-m68hc12.ld newlib-main-integrate/libgloss/m68hc11/sim-valid-m68hc12.ld
--- newlib-main/libgloss/m68hc11/sim-valid-m68hc12.ld Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/sim-valid-m68hc12.ld Sat Jul 20 01:18:28 2002
@@ -0,0 +1,311 @@
+/* Linker script for 68HC12 executable (PROM). */
+ENTRY(_start)
+OUTPUT_FORMAT("elf32-m68hc12", "elf32-m68hc12", "elf32-m68hc12")
+OUTPUT_ARCH(m68hc12)
+
+GROUP(-lc -lbcc -lgcc)
+SEARCH_DIR(.);
+/* Fixed definition of the available memory banks.
+ See generic emulation script for a user defined configuration. */
+
+/* The memory layout below is suitable for gcc validation.
+ It takes care of big programs allowing up to 48128 bytes
+ of text while allowing some programs that consume some
+ memory (comp-goto-1 requires the RAM to be set to 0x4400
+ to avoid head<->stack collision in malloc/sbrk). */
+MEMORY
+{
+ page0 (rwx) : ORIGIN = 0x00, LENGTH = 256
+ text (rx) : ORIGIN = 0x04400, LENGTH = 0x10000 - 0x4400
+ data : ORIGIN = 0x01100, LENGTH = 0x2000 - 0x1100
+}
+/* Setup the stack on the top of the data memory bank. */
+PROVIDE (_stack = 0x04400 - 1);
+SECTIONS
+{
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .rel.text :
+ {
+ *(.rel.text)
+ *(.rel.text.*)
+ *(.rel.gnu.linkonce.t.*)
+ }
+ .rela.text :
+ {
+ *(.rela.text)
+ *(.rela.text.*)
+ *(.rela.gnu.linkonce.t.*)
+ }
+ .rel.data :
+ {
+ *(.rel.data)
+ *(.rel.data.*)
+ *(.rel.gnu.linkonce.d.*)
+ }
+ .rela.data :
+ {
+ *(.rela.data)
+ *(.rela.data.*)
+ *(.rela.gnu.linkonce.d.*)
+ }
+ .rel.rodata :
+ {
+ *(.rel.rodata)
+ *(.rel.rodata.*)
+ *(.rel.gnu.linkonce.r.*)
+ }
+ .rela.rodata :
+ {
+ *(.rela.rodata)
+ *(.rela.rodata.*)
+ *(.rela.gnu.linkonce.r.*)
+ }
+ .rel.sdata :
+ {
+ *(.rel.sdata)
+ *(.rel.sdata.*)
+ *(.rel.gnu.linkonce.s.*)
+ }
+ .rela.sdata :
+ {
+ *(.rela.sdata)
+ *(.rela.sdata.*)
+ *(.rela.gnu.linkonce.s.*)
+ }
+ .rel.sbss :
+ {
+ *(.rel.sbss)
+ *(.rel.sbss.*)
+ *(.rel.gnu.linkonce.sb.*)
+ }
+ .rela.sbss :
+ {
+ *(.rela.sbss)
+ *(.rela.sbss.*)
+ *(.rel.gnu.linkonce.sb.*)
+ }
+ .rel.bss :
+ {
+ *(.rel.bss)
+ *(.rel.bss.*)
+ *(.rel.gnu.linkonce.b.*)
+ }
+ .rela.bss :
+ {
+ *(.rela.bss)
+ *(.rela.bss.*)
+ *(.rela.gnu.linkonce.b.*)
+ }
+ .rela.stext : { *(.rela.stest) }
+ .rela.etext : { *(.rela.etest) }
+ .rela.sdata : { *(.rela.sdata) }
+ .rela.edata : { *(.rela.edata) }
+ .rela.eit_v : { *(.rela.eit_v) }
+ .rela.ebss : { *(.rela.ebss) }
+ .rela.srodata : { *(.rela.srodata) }
+ .rela.erodata : { *(.rela.erodata) }
+ .rela.got : { *(.rela.got) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rela.init : { *(.rela.init) }
+ .rela.fini : { *(.rela.fini) }
+ .rela.plt : { *(.rela.plt) }
+ .rel.stext : { *(.rel.stest) }
+ .rel.etext : { *(.rel.etest) }
+ .rel.sdata : { *(.rel.sdata) }
+ .rel.edata : { *(.rel.edata) }
+ .rel.ebss : { *(.rel.ebss) }
+ .rel.eit_v : { *(.rel.eit_v) }
+ .rel.srodata : { *(.rel.srodata) }
+ .rel.erodata : { *(.rel.erodata) }
+ .rel.got : { *(.rel.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rel.init : { *(.rel.init) }
+ .rel.fini : { *(.rel.fini) }
+ .rel.plt : { *(.rel.plt) }
+ /* Concatenate .page0 sections. Put them in the page0 memory bank
+ unless we are creating a relocatable file. */
+ .page0 :
+ {
+ *(.page0)
+ } > page0
+
+ /* Start of text section. */
+ .stext :
+ {
+ *(.stext)
+ } > text
+ .init :
+ {
+ *(.init)
+ } =0
+ .text :
+ {
+ /* Put startup code at beginning so that _start keeps same address. */
+ /* Startup code. */
+ *(.install0) /* Section should setup the stack pointer. */
+ *(.install1) /* Place holder for applications. */
+ *(.install2) /* Optional installation of data sections in RAM. */
+ *(.install3) /* Place holder for applications. */
+ *(.install4) /* Section that calls the main. */
+ *(.init)
+ *(.text)
+ *(.text.*)
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t.*)
+ /* Finish code. */
+ *(.fini0) /* Beginning of finish code (_exit symbol). */
+ *(.fini1) /* Place holder for applications. */
+ *(.fini2) /* C++ destructors. */
+ *(.fini3) /* Place holder for applications. */
+ *(.fini4) /* Runtime exit. */
+ _etext = .;
+ PROVIDE (etext = .);
+ } > text
+ .eh_frame :
+ {
+ *(.eh_frame)
+ } > text
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ } > text
+ .rodata1 :
+ {
+ *(.rodata1)
+ } > text
+ /* Constructor and destructor tables are in ROM. */
+ .ctors :
+ {
+ PROVIDE (__CTOR_LIST__ = .);
+ *(.ctors)
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors)) */
+ PROVIDE(__CTOR_END__ = .);
+ } > text
+ .dtors :
+ {
+ PROVIDE(__DTOR_LIST__ = .);
+ *(.dtors)
+ /*
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors)) */
+ PROVIDE(__DTOR_END__ = .);
+ } > text
+ /* Start of the data section image in ROM. */
+ __data_image = .;
+ PROVIDE (__data_image = .);
+ /* All read-only sections that normally go in PROM must be above.
+ We construct the DATA image section in PROM at end of all these
+ read-only sections. The data image must be copied at init time.
+ Refer to GNU ld, Section 3.6.8.2 Output Section LMA. */
+ .data : AT (__data_image)
+ {
+ __data_section_start = .;
+ PROVIDE (__data_section_start = .);
+ *(.sdata)
+ *(.data)
+ *(.data.*)
+ *(.data1)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ _edata = .;
+ PROVIDE (edata = .);
+ } > data
+ __data_section_size = SIZEOF(.data);
+ PROVIDE (__data_section_size = SIZEOF(.data));
+ __data_image_end = __data_image + __data_section_size;
+/* SCz: this does not work yet... This is supposed to force the loading
+ of _map_data.o (from libgcc.a) when the .data section is not empty.
+ By doing so, this should bring the code that copies the .data section
+ from ROM to RAM at init time.
+ ___pre_comp_data_size = SIZEOF(.data);
+ __install_data_sections = ___pre_comp_data_size > 0 ?
+ __map_data_sections : 0;
+*/
+ /* .install :
+ {
+ . = _data_image_end;
+ } > text */
+ /* Relocation for some bss and data sections. */
+ .bss :
+ {
+ __bss_start = .;
+ *(.softregs)
+ *(.sbss)
+ *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ PROVIDE (_end = .);
+ } > data
+ __bss_size = SIZEOF(.bss);
+ PROVIDE (__bss_size = SIZEOF(.bss));
+ /* If the 'vectors_addr' symbol is defined, it indicates the start address
+ of interrupt vectors. This depends on the 68HC11 operating mode:
+ Addr
+ Single chip 0xffc0
+ Extended mode 0xffc0
+ Bootstrap 0x00c0
+ Test 0xbfc0
+ In general, the vectors address is 0xffc0. This can be overriden
+ with the '-defsym vectors_addr=0xbfc0' ld option.
+ Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
+ they are redirected to 0x00c0 by the internal PROM. Application's vectors
+ must also consist of jump instructions (see Motorola's manual). */
+ PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
+ .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
+ {
+ *(.vectors)
+ }
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0.
+ Treatment of DWARF debug section must be at end of the linker
+ script to avoid problems when there are undefined symbols. It's necessary
+ to avoid that the DWARF section is relocated before such undefined
+ symbols are found. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+}
diff --exclude=CVS --exclude=configure -Nrup newlib-main/libgloss/m68hc11/syscalls.c newlib-main-integrate/libgloss/m68hc11/syscalls.c
--- newlib-main/libgloss/m68hc11/syscalls.c Thu Jan 1 01:00:00 1970
+++ newlib-main-integrate/libgloss/m68hc11/syscalls.c Wed Jul 24 00:08:26 2002
@@ -0,0 +1,74 @@
+/* pseudo system calls for M68HC11 & M68HC12.
+ * Copyright (C) 1999, 2000, 2001, 2002 Stephane Carrez (stcarrez@nerim.fr)
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <unistd.h>
+
+extern void outbyte(char c);
+extern char inbyte(void);
+
+int
+read(int file, void *p, size_t nbytes)
+{
+ int i = 0;
+ char* buf = (char*) p;
+
+ for (i = 0; i < nbytes; i++) {
+ *(buf + i) = inbyte();
+ if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+ i++;
+ break;
+ }
+ }
+ return (i);
+}
+
+int
+write(int file, const void *p, size_t len)
+{
+ const char *ptr = (const char*) p;
+ int todo;
+
+ for (todo = len; todo; --todo)
+ {
+ outbyte (*ptr++);
+ }
+ return(len);
+}
+
+void *
+sbrk(size_t incr)
+{
+ extern char _end; /* Defined by the linker */
+ static char *heap_end;
+ char *prev_heap_end;
+
+ register char *stack_ptr asm ("sp");
+
+ if (heap_end == 0)
+ {
+ heap_end = &_end;
+ }
+ prev_heap_end = heap_end;
+ if (heap_end + incr > stack_ptr)
+ {
+ write (1, "Heap and stack collision\n", 25);
+ abort ();
+ }
+ heap_end += incr;
+ return ((void*) prev_heap_end);
+}
+
+/* end of syscalls.c */