Re: ARM SWI

[Bryce Schober <bryceman at dpzone dot com>]

Check out the GCC-Inline-Assembly-HOWTO here: 
http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html#s2

Also, more info on inline assembly operands constraints and such can be found in the gcc manual.

Vijay Deep wrote:
> hi all
>
> 	Can anyone tell what does %1, %2, %a3 mean in the following line
> "mov r0, %1; mov r1, %2; swi %a3; mov %0, r0". It occurs in the function
> below :
>
> do_AngelSWI (int reason, void * arg)
> {
>   int value;
>   //It enters here
>   asm volatile ("mov r0, %1; mov r1, %2; swi %a3; mov %0, r0"
>        : "=r" (value) /* Outputs */
>        : "r" (reason), "r" (arg), "i" (AngelSWI) /* Inputs */
>        : "r0", "r1", "r2", "r3", "ip", "lr", "memory", "cc"
>                 /* Clobbers r0 and r1, and lr if in supervisor mode */);
>                 /* Accordingly to page 13-77 of ARM DUI 0040D other
> registers
>                    can also be clobbered.  Some memory positions may also
> be
>                    changed by a system call, so they should not be kept in
>                    registers. Note: we are assuming the manual is right
> and
>                    Angel is respecting the APCS.  */
>   return value;
> }
>
> Thanks in advance
> Regards
> Vijay Deep