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[patch] libgloss port to PowerPC in Xilinx FPGAs


Hi,

attached is a patch which adds support for the PowerPC 405 hard core in
Xilinx Virtex2-Pro and Virtex4 FPGAs. It is not targeted to a specific
board. The only assumption on hardware is that the FPGA design implements
the Xilinx UARTLITE IP core.

You can download the full patch from http://www.michaelgeng.de/newlib/xilinx-powerpc.patch.
Attached is a the same patch with the changes on the configure and 
aclocal.m4 files removed. 

Do you need more information on it? Any comments welcome!

Michael

Attachment: xilinx-powerpc-short.patch
Description: Text document


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