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Re: [perfmon] Re: perfmon2 TODO list (4/4)


On Tue, Apr 18, 2006 at 01:38:57AM -0700, Stephane Eranian wrote:
> Will,
> 
> On Mon, Apr 17, 2006 at 09:56:57AM -0400, William Cohen wrote:
> > Stephane Eranian wrote:
> > >Frank,
> > >
> > >On Thu, Apr 13, 2006 at 06:22:51PM -0400, Frank Ch. Eigler wrote:
> > >
> > >>>I have another question related maybe more to kprobes and how the
> > >>>intercept is done: breakpoints, code rewriting. If you use
> > >>>breakpoints, then I wonder how this works in SMP machines. Do you
> > >>>intervene on each CPU?
> > >>
> > >>That's right: as each CPU trips across a breakpoint, they are made to
> > >>run our handler, then single-step across the original instruction,
> > >>then resume.  It's a multi-step process described in kprobes
> > >>documentation.  From systemtap's point of view, it's a black box.
> > >>
> > >
> > >So you are saying that kprobes takes care of programming the debug
> > >registers on all CPUs if necessary.
> > >
> > 
> > Kprobe uses breakpoint instructions, so the breakpoint registers on the 
> > processor are not currently being used. Thus, a breakpoint instruction 
> > is placed at the location where the probe is desired and the processor's 
> > debugging registers are not touch by kprobes.
> > 
> > There has been some discussion for SystemTap producing probes that use 
> > the processors debug hardware to watch for accesses to specific memory 
> > locations.
> > 
> So from what you are saying neither kprobes nor systemap uses IPI for any setup/tear
> down at this point. Is that right?

That is right. All we do is flush_icache_range() at the time of
modifiying text (registration and unregistration of a kprobe).

Ananth


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