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Re: [PATCH, committed] X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
- From: "Jan Beulich" <JBeulich at suse dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: <binutils at sourceware dot org>
- Date: Thu, 03 Nov 2016 10:31:51 -0600
- Subject: Re: [PATCH, committed] X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
- Authentication-results: sourceware.org; auth=none
- References: <20161103161838.GA23454@intel.com>
>>> On 03.11.16 at 17:18, <hongjiu.lu@intel.com> wrote:
> Update x86 disassembler to treat opcode 0x82 as an aliase of opcode 0x80
> in 32-bit mode.
>
> gas/
>
> PR binutils/20754
> * testsuite/gas/i386/opcode.s: Add tests for opcode 0x82.
> * testsuite/gas/i386/opcode-intel.d: Updated.
> * testsuite/gas/i386/opcode.d: Likewise.
>
> opcodes/
>
> PR binutils/20754
> * i386-dis.c (REG_82): New.
> (X86_64_82_REG_0): Likewise.
> (X86_64_82_REG_1): Likewise.
> (X86_64_82_REG_2): Likewise.
> (X86_64_82_REG_3): Likewise.
> (X86_64_82_REG_4): Likewise.
> (X86_64_82_REG_5): Likewise.
> (X86_64_82_REG_6): Likewise.
> (X86_64_82_REG_7): Likewise.
Why do you need all these? I've had a patch pending doing about the
same, but with fewer new identifiers.
Also, my patch at onces corrects the aliasing for F6/1 and F7/1 (to
F6/0 and F7/0 respectively) - are you intending to take care of that
too then?
Jan