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[PATCH][AArch64] Add ARMv8.3 single source PAC instructions
- From: Szabolcs Nagy <szabolcs dot nagy at arm dot com>
- To: Binutils <binutils at sourceware dot org>
- Cc: <nd at arm dot com>
- Date: Tue, 8 Nov 2016 10:10:42 +0000
- Subject: [PATCH][AArch64] Add ARMv8.3 single source PAC instructions
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Add support for ARMv8.3 pointer authentication instructions
that are encoded as single source data processing instructions.
(generated files are not in the diff.)
opcodes/
2016-11-08 Szabolcs Nagy <szabolcs.nagy@arm.com>
* aarch64-tbl.h (arch64_opcode_table): Add pacia, pacib, pacda, pacdb, autia,
autib, autda, autdb, paciza, pacizb, pacdza, pacdzb, autiza, autizb, autdza,
autdzb, xpaci, xpacd.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
gas/testsuite/
2016-11-08 Szabolcs Nagy <szabolcs.nagy@arm.com>
* gas/aarch64/pac.s: New.
* gas/aarch64/pac.d: New.
diff --git a/gas/testsuite/gas/aarch64/pac.d b/gas/testsuite/gas/aarch64/pac.d
new file mode 100644
index 0000000..448e674
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pac.d
@@ -0,0 +1,34 @@
+#objdump: -dr
+#as: -march=armv8.3-a
+
+.*: file .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: dac10083 pacia x3, x4
+ 4: dac103e5 pacia x5, sp
+ 8: dac10483 pacib x3, x4
+ c: dac107e5 pacib x5, sp
+ 10: dac10883 pacda x3, x4
+ 14: dac10be5 pacda x5, sp
+ 18: dac10c83 pacdb x3, x4
+ 1c: dac10fe5 pacdb x5, sp
+ 20: dac11083 autia x3, x4
+ 24: dac113e5 autia x5, sp
+ 28: dac11483 autib x3, x4
+ 2c: dac117e5 autib x5, sp
+ 30: dac11883 autda x3, x4
+ 34: dac11be5 autda x5, sp
+ 38: dac11c83 autdb x3, x4
+ 3c: dac11fe5 autdb x5, sp
+ 40: dac123e5 paciza x5
+ 44: dac127e5 pacizb x5
+ 48: dac12be5 pacdza x5
+ 4c: dac12fe5 pacdzb x5
+ 50: dac133e5 autiza x5
+ 54: dac137e5 autizb x5
+ 58: dac13be5 autdza x5
+ 5c: dac13fe5 autdzb x5
+ 60: dac143e5 xpaci x5
+ 64: dac147e5 xpacd x5
diff --git a/gas/testsuite/gas/aarch64/pac.s b/gas/testsuite/gas/aarch64/pac.s
new file mode 100644
index 0000000..dd01682
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pac.s
@@ -0,0 +1,34 @@
+ /* ARMv8.3 Pointer authentication instructions. */
+ .text
+
+ /* Basic instructions. */
+ pacia x3, x4
+ pacia x5, sp
+ pacib x3, x4
+ pacib x5, sp
+ pacda x3, x4
+ pacda x5, sp
+ pacdb x3, x4
+ pacdb x5, sp
+
+ autia x3, x4
+ autia x5, sp
+ autib x3, x4
+ autib x5, sp
+ autda x3, x4
+ autda x5, sp
+ autdb x3, x4
+ autdb x5, sp
+
+ paciza x5
+ pacizb x5
+ pacdza x5
+ pacdzb x5
+
+ autiza x5
+ autizb x5
+ autdza x5
+ autdzb x5
+
+ xpaci x5
+ xpacd x5
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 02b0a1a..97522d6 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2665,6 +2665,24 @@ struct aarch64_opcode aarch64_opcode_table[] =
CORE_INSN ("clz", 0x5ac01000, 0x7ffffc00, dp_1src, 0, OP2 (Rd, Rn), QL_I2SAME, F_SF),
CORE_INSN ("cls", 0x5ac01400, 0x7ffffc00, dp_1src, 0, OP2 (Rd, Rn), QL_I2SAME, F_SF),
CORE_INSN ("rev32", 0xdac00800, 0xfffffc00, dp_1src, 0, OP2 (Rd, Rn), QL_I2SAMEX, 0),
+ V8_3_INSN ("pacia", 0xdac10000, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("pacib", 0xdac10400, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("pacda", 0xdac10800, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("pacdb", 0xdac10c00, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("autia", 0xdac11000, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("autib", 0xdac11400, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("autda", 0xdac11800, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("autdb", 0xdac11c00, 0xfffffc00, dp_1src, OP2 (Rd, Rn_SP), QL_I2SAMEX, 0),
+ V8_3_INSN ("paciza", 0xdac123e0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("pacizb", 0xdac127e0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("pacdza", 0xdac12be0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("pacdzb", 0xdac12fe0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("autiza", 0xdac133e0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("autizb", 0xdac137e0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("autdza", 0xdac13be0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("autdzb", 0xdac13fe0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("xpaci", 0xdac143e0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
+ V8_3_INSN ("xpacd", 0xdac147e0, 0xffffffe0, dp_1src, OP1 (Rd), QL_I1X, 0),
/* Data-processing (2 source). */
CORE_INSN ("udiv", 0x1ac00800, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF),
CORE_INSN ("sdiv", 0x1ac00c00, 0x7fe0fc00, dp_2src, 0, OP3 (Rd, Rn, Rm), QL_I3SAMER, F_SF),