[PATCH] RISC-V: Add riscv-*-* configure support, and minor cleanup.

Jim Wilson jimw@sifive.com
Fri Jul 6 00:50:00 GMT 2018


Support for riscv as a CPU has been added to upstream config.sub, so we need
to support it in binutils now.  This adds riscv as an alias for riscv32.  This
also fixes a consistency problem, where bfd accepted riscv32 and ld accepted
riscv32*.  It should be riscv32* everywhere for now, and same with riscv64*.

Tested with riscv{32,64}-{elf,linux} and riscv-elf builds and make checks.
There were no regressions.

Committed.

Jim

	bfd/
	* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
	(riscv64*-*-*): Likewise.
	(riscv-*-*): Add as an alias for riscv32*-*-*.
	ld/
	* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
---
 bfd/config.bfd   | 4 ++--
 ld/configure.tgt | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/bfd/config.bfd b/bfd/config.bfd
index f8ca72b332..6391f35684 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1174,12 +1174,12 @@ case "${targ}" in
     ;;
 
 #ifdef BFD64
-  riscv32-*-*)
+  riscv-*-* | riscv32*-*-*)
     targ_defvec=riscv_elf32_vec
     targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
     want64=true
     ;;
-  riscv64-*-*)
+  riscv64*-*-*)
     targ_defvec=riscv_elf64_vec
     targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
     want64=true
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 3386c3d928..fad8b2e5c8 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -632,7 +632,8 @@ pru*-*-*)		targ_emul=pruelf ;;
 riscv32*-*-linux*)	targ_emul=elf32lriscv
 			targ_extra_emuls="elf32lriscv_ilp32f elf32lriscv_ilp32 elf64lriscv elf64lriscv_lp64f elf64lriscv_lp64"
 			targ_extra_libpath=$targ_extra_emuls ;;
-riscv32*-*-*)		targ_emul=elf32lriscv
+riscv-*-* | riscv32*-*-*)
+			targ_emul=elf32lriscv
 			targ_extra_emuls="elf64lriscv"
 			targ_extra_libpath=$targ_extra_emuls ;;
 riscv64*-*-linux*)	targ_emul=elf64lriscv
-- 
2.17.1



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