[PATCH] [BZ#2505] PPC32 should use lwsync where possible

[Steven Munroe]

[BZ#2505]

The currently PPC32 still uses (full) sync for atomic.h and
lowlevellock.h to insure backward compatibility with older 32-bit PPC
chips. This is penalizing the performance of 32-bit applications on the
newer 64-bit processors like 970, POWER4, and POWER5 which do implement
lwsync.

With gcc-4.1, gcc will define _ARCH_PWR4 when -mcpu=[970, power4,
power5,power5+]  is specified. This works with the --with-cpu= configure
option allow builds targeted for 64-bit hardware to include new
instructions available on power4 and newer architecture levels.

The attached patches will define macros to use lwsync if _ARCH_PWR4 is
defined.


-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: ppc32-lwsync-20060331.txt
URL: <http://sourceware.org/pipermail/libc-alpha/attachments/20060403/e95939be/attachment.txt>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: ppc32-nptl-lwsync-20060331.txt
URL: <http://sourceware.org/pipermail/libc-alpha/attachments/20060403/e95939be/attachment-0001.txt>